On Sat, May 02, 2020 at 07:03:57PM +0530, Anshuman Khandual wrote: > Enable all remaining feature bits like EVT, CCIDX, LSM, HPDS, CnP, XNX, > SpecSEI in ID_MMFR4 register per ARM DDI 0487F.a. > > Cc: Catalin Marinas <[email protected]> > Cc: Will Deacon <[email protected]> > Cc: Mark Rutland <[email protected]> > Cc: Suzuki K Poulose <[email protected]> > Cc: [email protected] > Cc: [email protected] > > Suggested-by: Mark Rutland <[email protected]> > Reviewed-by: Suzuki K Poulose <[email protected]> > Signed-off-by: Anshuman Khandual <[email protected]> > --- > arch/arm64/include/asm/sysreg.h | 8 ++++++++ > arch/arm64/kernel/cpufeature.c | 13 +++++++++++++ > 2 files changed, 21 insertions(+) > > diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > index f9e3b9350540..0f34927f52b9 100644 > --- a/arch/arm64/include/asm/sysreg.h > +++ b/arch/arm64/include/asm/sysreg.h > @@ -790,6 +790,14 @@ > #define ID_ISAR6_DP_SHIFT 4 > #define ID_ISAR6_JSCVT_SHIFT 0 > > +#define ID_MMFR4_EVT_SHIFT 28 > +#define ID_MMFR4_CCIDX_SHIFT 24 > +#define ID_MMFR4_LSM_SHIFT 20 > +#define ID_MMFR4_HPDS_SHIFT 16 > +#define ID_MMFR4_CNP_SHIFT 12 > +#define ID_MMFR4_XNX_SHIFT 8
Why didn't you add ID_MMFR4_AC2_SHIFT as well? Will
