The only mux controls the MIPI DSI input selection.

Signed-off-by: Guido Günther <[email protected]>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi 
b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 4fdd60f2c51e..3f3594d9485c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -440,8 +440,15 @@
                        };
 
                        iomuxc_gpr: syscon@30340000 {
-                               compatible = "fsl,imx8mq-iomuxc-gpr", 
"fsl,imx6q-iomuxc-gpr", "syscon";
+                               compatible = "fsl,imx8mq-iomuxc-gpr", 
"fsl,imx6q-iomuxc-gpr",
+                                            "syscon", "simple-mfd";
                                reg = <0x30340000 0x10000>;
+
+                               mux: mux-controller {
+                                       compatible = "mmio-mux";
+                                       #mux-control-cells = <1>;
+                                       mux-reg-masks = <0x34 0x00000004>; /* 
MIPI_MUX_SEL */
+                               };
                        };
 
                        ocotp: ocotp-ctrl@30350000 {
-- 
2.20.1

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