This reverts commit 2b845d4b4acd9422bbb668989db8dc36dfc8f438. That commit introduces build issues for programs compiled in Thumb mode. Rather than try to be clever and emit a valid trap instruction on arm32, which requires special care about big/little endian handling on that architecture, just emit plain data. Data in the instruction stream is technically expected on arm32: this is how literal pools are implemented. Reverting to the prior behavior does exactly that.
Signed-off-by: Mathieu Desnoyers <[email protected]> CC: Peter Zijlstra <[email protected]> CC: Thomas Gleixner <[email protected]> CC: Joel Fernandes <[email protected]> CC: Catalin Marinas <[email protected]> CC: Dave Watson <[email protected]> CC: Will Deacon <[email protected]> CC: Shuah Khan <[email protected]> CC: Andi Kleen <[email protected]> CC: [email protected] CC: "H . Peter Anvin" <[email protected]> CC: Chris Lameter <[email protected]> CC: Russell King <[email protected]> CC: Michael Kerrisk <[email protected]> CC: "Paul E . McKenney" <[email protected]> CC: Paul Turner <[email protected]> CC: Boqun Feng <[email protected]> CC: Josh Triplett <[email protected]> CC: Steven Rostedt <[email protected]> CC: Ben Maurer <[email protected]> CC: [email protected] CC: Andy Lutomirski <[email protected]> CC: Andrew Morton <[email protected]> CC: Linus Torvalds <[email protected]> CC: Carlos O'Donell <[email protected]> CC: Florian Weimer <[email protected]> --- tools/testing/selftests/rseq/rseq-arm.h | 52 ++------------------------------- 1 file changed, 2 insertions(+), 50 deletions(-) diff --git a/tools/testing/selftests/rseq/rseq-arm.h b/tools/testing/selftests/rseq/rseq-arm.h index 84f28f147fb6..5f262c54364f 100644 --- a/tools/testing/selftests/rseq/rseq-arm.h +++ b/tools/testing/selftests/rseq/rseq-arm.h @@ -5,54 +5,7 @@ * (C) Copyright 2016-2018 - Mathieu Desnoyers <[email protected]> */ -/* - * RSEQ_SIG uses the udf A32 instruction with an uncommon immediate operand - * value 0x5de3. This traps if user-space reaches this instruction by mistake, - * and the uncommon operand ensures the kernel does not move the instruction - * pointer to attacker-controlled code on rseq abort. - * - * The instruction pattern in the A32 instruction set is: - * - * e7f5def3 udf #24035 ; 0x5de3 - * - * This translates to the following instruction pattern in the T16 instruction - * set: - * - * little endian: - * def3 udf #243 ; 0xf3 - * e7f5 b.n <7f5> - * - * pre-ARMv6 big endian code: - * e7f5 b.n <7f5> - * def3 udf #243 ; 0xf3 - * - * ARMv6+ -mbig-endian generates mixed endianness code vs data: little-endian - * code and big-endian data. Ensure the RSEQ_SIG data signature matches code - * endianness. Prior to ARMv6, -mbig-endian generates big-endian code and data - * (which match), so there is no need to reverse the endianness of the data - * representation of the signature. However, the choice between BE32 and BE8 - * is done by the linker, so we cannot know whether code and data endianness - * will be mixed before the linker is invoked. - */ - -#define RSEQ_SIG_CODE 0xe7f5def3 - -#ifndef __ASSEMBLER__ - -#define RSEQ_SIG_DATA \ - ({ \ - int sig; \ - asm volatile ("b 2f\n\t" \ - "1: .inst " __rseq_str(RSEQ_SIG_CODE) "\n\t" \ - "2:\n\t" \ - "ldr %[sig], 1b\n\t" \ - : [sig] "=r" (sig)); \ - sig; \ - }) - -#define RSEQ_SIG RSEQ_SIG_DATA - -#endif +#define RSEQ_SIG 0x53053053 #define rseq_smp_mb() __asm__ __volatile__ ("dmb" ::: "memory", "cc") #define rseq_smp_rmb() __asm__ __volatile__ ("dmb" ::: "memory", "cc") @@ -125,8 +78,7 @@ do { \ __rseq_str(table_label) ":\n\t" \ ".word " __rseq_str(version) ", " __rseq_str(flags) "\n\t" \ ".word " __rseq_str(start_ip) ", 0x0, " __rseq_str(post_commit_offset) ", 0x0, " __rseq_str(abort_ip) ", 0x0\n\t" \ - ".arm\n\t" \ - ".inst " __rseq_str(RSEQ_SIG_CODE) "\n\t" \ + ".word " __rseq_str(RSEQ_SIG) "\n\t" \ __rseq_str(label) ":\n\t" \ teardown \ "b %l[" __rseq_str(abort_label) "]\n\t" -- 2.11.0
