Hi Peter,
On 5/29/19 1:32 PM, Peter Zijlstra wrote:
On Wed, May 29, 2019 at 01:25:46PM +0100, Raphael Gault wrote:
Hi Robin, Hi Peter,
On 5/29/19 11:50 AM, Robin Murphy wrote:
On 29/05/2019 11:46, Raphael Gault wrote:
Hi Peter,
On 5/29/19 10:46 AM, Peter Zijlstra wrote:
On Tue, May 28, 2019 at 04:03:17PM +0100, Raphael Gault wrote:
+static int armv8pmu_access_event_idx(struct perf_event *event)
+{
+ if (!(event->hw.flags & ARMPMU_EL0_RD_CNTR))
+ return 0;
+
+ /*
+ * We remap the cycle counter index to 32 to
+ * match the offset applied to the rest of
+ * the counter indeces.
+ */
+ if (event->hw.idx == ARMV8_IDX_CYCLE_COUNTER)
+ return 32;
+
+ return event->hw.idx;
Is there a guarantee event->hw.idx is never 0? Or should you, just like
x86, use +1 here?
You are right, I should use +1 here. Thanks for pointing that out.
Isn't that already the case though, since we reserve index 0 for the
cycle counter? I'm looking at ARMV8_IDX_TO_COUNTER() here...
Well the current behaviour is correct and takes care of the zero case with
the ARMV8_IDX_CYCLE_COUNTER check. But using ARMV8_IDX_TO_COUNTER() and add
1 would also work. However this seems indeed redundant with the current
value held in event->hw.idx.
Note that whatever you pick now will become ABI. Also note that the
comment/pseudo-code in perf_event_mmap_page suggests to use idx-1 for
the actual hardware access.
Indeed that's true. As for the pseudo-code in perf_event_mmap_page. It
is compatible with what I do here. The two approach are only different
in form but it is in both case necessary to subtract 1 on the returned
value in order to access the correct hardware counter.
Thank you,
--
Raphael Gault
