Commit-ID: 6d2b0054d9a448d384264e003474219497e70bb9 Gitweb: https://git.kernel.org/tip/6d2b0054d9a448d384264e003474219497e70bb9 Author: Daniel Bristot de Oliveira <[email protected]> AuthorDate: Fri, 21 Dec 2018 11:27:30 +0100 Committer: Ingo Molnar <[email protected]> CommitDate: Fri, 19 Apr 2019 19:37:34 +0200
x86/alternative: Split text_poke_bp() into tree steps text_poke_bp() updates instructions on live kernel on SMP in three steps: 1) add a int3 trap to the address that will be patched 2) update all but the first byte of the patched range 3) replace the first byte (int3) by the first byte of This patch creates one function for each of these steps. Signed-off-by: Daniel Bristot de Oliveira <[email protected]> Acked-by: Jiri Kosina <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Andy Lutomirski <[email protected]> Cc: Arnaldo Carvalho de Melo <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Brian Gerst <[email protected]> Cc: Chris von Recklinghausen <[email protected]> Cc: Clark Williams <[email protected]> Cc: Denys Vlasenko <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: H. Peter Anvin <[email protected]> Cc: Jason Baron <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Josh Poimboeuf <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Marcelo Tosatti <[email protected]> Cc: Masami Hiramatsu <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Scott Wood <[email protected]> Cc: Steven Rostedt (VMware) <[email protected]> Cc: Thomas Gleixner <[email protected]> Link: http://lkml.kernel.org/r/67c326c50f8efa728d3040d3563f258949ff32c4.1545228276.git.bris...@redhat.com Signed-off-by: Ingo Molnar <[email protected]> --- arch/x86/kernel/alternative.c | 38 +++++++++++++++++++++++++++----------- 1 file changed, 27 insertions(+), 11 deletions(-) diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c index 9a79c7808f9c..7fce844017f1 100644 --- a/arch/x86/kernel/alternative.c +++ b/arch/x86/kernel/alternative.c @@ -768,6 +768,29 @@ int poke_int3_handler(struct pt_regs *regs) } NOKPROBE_SYMBOL(poke_int3_handler); +static void text_poke_bp_set_handler(void *addr, void *handler, + unsigned char int3) +{ + bp_int3_handler = handler; + bp_int3_addr = (u8 *)addr + sizeof(int3); + text_poke(addr, &int3, sizeof(int3)); +} + +static void patch_all_but_first_byte(void *addr, const void *opcode, + size_t len, unsigned char int3) +{ + /* patch all but the first byte */ + text_poke((char *)addr + sizeof(int3), + (const char *) opcode + sizeof(int3), + len - sizeof(int3)); +} + +static void patch_first_byte(void *addr, const void *opcode, unsigned char int3) +{ + /* patch the first byte */ + text_poke(addr, opcode, sizeof(int3)); +} + /** * text_poke_bp() -- update instructions on live kernel on SMP * @addr: address to patch @@ -792,27 +815,21 @@ void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler) { unsigned char int3 = 0xcc; - bp_int3_handler = handler; - bp_int3_addr = (u8 *)addr + sizeof(int3); - bp_patching_in_progress = true; - lockdep_assert_held(&text_mutex); + bp_patching_in_progress = true; /* * Corresponding read barrier in int3 notifier for making sure the * in_progress and handler are correctly ordered wrt. patching. */ smp_wmb(); - text_poke(addr, &int3, sizeof(int3)); + text_poke_bp_set_handler(addr, handler, int3); on_each_cpu(do_sync_core, NULL, 1); if (len - sizeof(int3) > 0) { - /* patch all but the first byte */ - text_poke((char *)addr + sizeof(int3), - (const char *) opcode + sizeof(int3), - len - sizeof(int3)); + patch_all_but_first_byte(addr, opcode, len, int3); /* * According to Intel, this core syncing is very likely * not necessary and we'd be safe even without it. But @@ -821,8 +838,7 @@ void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler) on_each_cpu(do_sync_core, NULL, 1); } - /* patch the first byte */ - text_poke(addr, opcode, sizeof(int3)); + patch_first_byte(addr, opcode, int3); on_each_cpu(do_sync_core, NULL, 1); /*
