By default, the muxes should re-parent on set_rate.
This would allow the drivers to control only the leaf clock node,
leaving the rest to the clock driver, that way simplifying the
clock control.

Signed-off-by: Abel Vesa <[email protected]>
---
 drivers/clk/imx/clk.h | 15 +++++++--------
 1 file changed, 7 insertions(+), 8 deletions(-)

diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 5748ec8..055b602 100644
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -148,7 +148,7 @@ static inline struct clk *imx_clk_mux_ldb(const char *name, 
void __iomem *reg,
                        int num_parents)
 {
        return clk_register_mux(NULL, name, parents, num_parents,
-                       CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, reg,
+                       CLK_SET_RATE_PARENT, reg,
                        shift, width, CLK_MUX_READ_ONLY, &imx_ccm_lock);
 }
 
@@ -321,7 +321,7 @@ static inline struct clk *imx_clk_mux(const char *name, 
void __iomem *reg,
                        int num_parents)
 {
        return clk_register_mux(NULL, name, parents, num_parents,
-                       CLK_SET_RATE_NO_REPARENT, reg, shift,
+                       0, reg, shift,
                        width, 0, &imx_ccm_lock);
 }
 
@@ -330,7 +330,7 @@ static inline struct clk *imx_clk_mux2(const char *name, 
void __iomem *reg,
                        int num_parents)
 {
        return clk_register_mux(NULL, name, parents, num_parents,
-                       CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
+                       CLK_OPS_PARENT_ENABLE,
                        reg, shift, width, 0, &imx_ccm_lock);
 }
 
@@ -340,7 +340,6 @@ static inline struct clk_hw *imx_clk_hw_mux2(const char 
*name, void __iomem *reg
                                             int num_parents)
 {
        return clk_hw_register_mux(NULL, name, parents, num_parents,
-                                  CLK_SET_RATE_NO_REPARENT |
                                   CLK_OPS_PARENT_ENABLE,
                                   reg, shift, width, 0, &imx_ccm_lock);
 }
@@ -351,7 +350,7 @@ static inline struct clk *imx_clk_mux_flags(const char 
*name,
                        unsigned long flags)
 {
        return clk_register_mux(NULL, name, parents, num_parents,
-                       flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,
+                       flags, reg, shift, width, 0,
                        &imx_ccm_lock);
 }
 
@@ -361,7 +360,7 @@ static inline struct clk *imx_clk_mux2_flags(const char 
*name,
                int num_parents, unsigned long flags)
 {
        return clk_register_mux(NULL, name, parents, num_parents,
-                       flags | CLK_SET_RATE_NO_REPARENT | 
CLK_OPS_PARENT_ENABLE,
+                       flags | CLK_OPS_PARENT_ENABLE,
                        reg, shift, width, 0, &imx_ccm_lock);
 }
 
@@ -373,7 +372,7 @@ static inline struct clk_hw *imx_clk_hw_mux_flags(const 
char *name,
                                                  unsigned long flags)
 {
        return clk_hw_register_mux(NULL, name, parents, num_parents,
-                                  flags | CLK_SET_RATE_NO_REPARENT,
+                                  flags,
                                   reg, shift, width, 0, &imx_ccm_lock);
 }
 
@@ -389,7 +388,7 @@ struct clk *imx8m_clk_composite_flags(const char *name,
 #define __imx8m_clk_composite(name, parent_names, reg, flags) \
        imx8m_clk_composite_flags(name, parent_names, \
                ARRAY_SIZE(parent_names), reg, \
-               flags | CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE)
+               flags | CLK_OPS_PARENT_ENABLE)
 
 #define imx8m_clk_composite(name, parent_names, reg) \
        __imx8m_clk_composite(name, parent_names, reg, 0)
-- 
2.7.4

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