On 14.11.18 11:43, Yogesh Narayan Gaur wrote: > Hi Frieder, > > [..] >>> >>> Ok, I will have a look at what could make the chip selection fail in >>> case of AHB read. >> >> Could you try with this change applied: >> >> @@ -503,7 +503,7 @@ static void fsl_qspi_select_mem(struct fsl_qspi *q, >> struct >> spi_device *spi) >> map_addr = q->memmap_phy; >> else >> map_addr = q->memmap_phy + >> - 2 * q->devtype_data->ahb_buf_size; >> + q->devtype_data->ahb_buf_size; >> >> qspi_writel(q, map_addr, q->iobase + QUADSPI_SFA1AD + >> (i * 4)); >> } >> > > I have tried above change and also have done few more changes but still AHB > read for CS1 is falling.
Maybe CS1 is not selected because we reuse the same memory offset as for CS0. Can you try with a fixed mapping for all four CS lines, like this: https://paste.ee/p/mYwjP? Thanks, Frieder
