On Fri, Jun 30, 2017 at 03:43:37PM +0200, Romain Perier wrote: > From: Martyn Welch <[email protected]> > > The IPU that drives HDMI must have its pre_sel set to pll2_pfd_396m > to avoid stepping on the LVDS output's toes, as the PLL can't be clocked > to the pixel clock and to the LVDS serial clock (3.5*pixel clock) at the > same time. > > As we are using ipu1_di0 and ipu2_di0, ensure both are switched to > to pll2_pfd2_396m to avoid issues. The LDB driver will switch the > required IPU to ldb_di1 when it uses it to drive LVDS. > > Signed-off-by: Martyn Welch <[email protected]> > Signed-off-by: Romain Perier <[email protected]>
Applied, thanks.
