From 33cd09e5a5ab4b52c3655d1daaf4cb74c8bbbb47 Mon Sep 17 00:00:00 2001 From: Shubham Bansal Date: Wed, 24 May 2017 02:41:36 +0530 Subject: [PATCH 2/2] Editted for ARMv5 compilation. --- arch/arm/net/bpf_jit_32.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c index 338d352..ad09e35 100644 --- a/arch/arm/net/bpf_jit_32.c +++ b/arch/arm/net/bpf_jit_32.c @@ -1015,7 +1015,7 @@ static inline void emit_rev16(const u8 rd, const u8 rn, struct jit_ctx *ctx) const u8 *tmp2 = bpf2a32[TMP_REG_2]; emit(ARM_AND_I(tmp2[1], rn, 0xff), ctx); - emit(ARM_MOV_S(tmp2[0], rn, SRTYPE_LSR, 8), ctx); + emit(ARM_MOV_SI(tmp2[0], rn, SRTYPE_LSR, 8), ctx); emit(ARM_AND_I(tmp2[0], tmp2[0], 0xff), ctx); emit(ARM_ORR_SI(rd, tmp2[0], tmp2[1], SRTYPE_LSL, 8), ctx); #else /* ARMv6+ */ @@ -1030,12 +1030,12 @@ static inline void emit_rev32(const u8 rd, const u8 rn, struct jit_ctx *ctx) const u8 *tmp2 = bpf2a32[TMP_REG_2]; emit(ARM_AND_I(tmp2[1], rn, 0xff), ctx); - emit(ARM_MOV_S(tmp2[0], rn, SRTYPE_LSR, 24), ctx); + emit(ARM_MOV_SI(tmp2[0], rn, SRTYPE_LSR, 24), ctx); emit(ARM_ORR_SI(ARM_IP, tmp2[0], tmp2[1], SRTYPE_LSL, 24), ctx); - emit(ARM_MOV_I(tmp2[1], rn, 0xff00), ctx); - emit(ARM_MOV_S(tmp2[0], rn, SRTYPE_LSR, 8), ctx); - emit(ARM_MOV_I(tmp2[0], tmp2[0], 0xff00), ctx); + emit(ARM_EOR_I(tmp2[1], rn, 0xff00), ctx); + emit(ARM_MOV_SI(tmp2[0], rn, SRTYPE_LSR, 8), ctx); + emit(ARM_EOR_I(tmp2[0], tmp2[0], 0xff00), ctx); emit(ARM_ORR_SI(tmp2[0], tmp2[0], tmp2[1], SRTYPE_LSL, 8), ctx); emit(ARM_ORR_R(rd, ARM_IP, tmp2[0]), ctx); #else /* ARMv6+ */ @@ -1389,7 +1389,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx) /* zero-extend 16 bits into 64 bits */ #if __LINUX_ARM_ARCH__ < 6 emit_a32_mov_i(tmp2[1], 0xffff, false, ctx); - emit(ARM_AND_R(rt, tmp2[1]), ctx); + emit(ARM_AND_R(rt, rt, tmp2[1]), ctx); #else /* ARMv6+ */ emit(ARM_UXTH(rt, rt), ctx); #endif -- 2.7.4