On Thursday 30 March 2017 12:18 AM, Olliver Schinagl wrote:
The tegra serial IP seems to be following the common layout and the
interrupt ID's match up nicely. Replace the magic values to match the
common serial_reg defines, with the addition of the Tegra unique End of
Data interrupt.

Signed-off-by: Olliver Schinagl <[email protected]>
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Adding Shardar for verifications.

Acked-by: Laxman Dewangan <[email protected]>

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