4.4-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Mika Westerberg <[email protected]>

commit 56211121c0825cd188caad05574fdc518d5cac6f upstream.

If async suspend is enabled, the driver may access registers concurrently
with another instance which may fail because of the bug in Cherryview GPIO
hardware. Prevent this by taking the shared lock while accessing the
hardware in suspend and resume hooks.

Signed-off-by: Mika Westerberg <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

---
 drivers/pinctrl/intel/pinctrl-cherryview.c |   10 ++++++++++
 1 file changed, 10 insertions(+)

--- a/drivers/pinctrl/intel/pinctrl-cherryview.c
+++ b/drivers/pinctrl/intel/pinctrl-cherryview.c
@@ -1568,8 +1568,11 @@ static int chv_pinctrl_suspend(struct de
 {
        struct platform_device *pdev = to_platform_device(dev);
        struct chv_pinctrl *pctrl = platform_get_drvdata(pdev);
+       unsigned long flags;
        int i;
 
+       raw_spin_lock_irqsave(&chv_lock, flags);
+
        pctrl->saved_intmask = readl(pctrl->regs + CHV_INTMASK);
 
        for (i = 0; i < pctrl->community->npins; i++) {
@@ -1590,6 +1593,8 @@ static int chv_pinctrl_suspend(struct de
                ctx->padctrl1 = readl(reg);
        }
 
+       raw_spin_unlock_irqrestore(&chv_lock, flags);
+
        return 0;
 }
 
@@ -1597,8 +1602,11 @@ static int chv_pinctrl_resume(struct dev
 {
        struct platform_device *pdev = to_platform_device(dev);
        struct chv_pinctrl *pctrl = platform_get_drvdata(pdev);
+       unsigned long flags;
        int i;
 
+       raw_spin_lock_irqsave(&chv_lock, flags);
+
        /*
         * Mask all interrupts before restoring per-pin configuration
         * registers because we don't know in which state BIOS left them
@@ -1643,6 +1651,8 @@ static int chv_pinctrl_resume(struct dev
        chv_writel(0xffff, pctrl->regs + CHV_INTSTAT);
        chv_writel(pctrl->saved_intmask, pctrl->regs + CHV_INTMASK);
 
+       raw_spin_unlock_irqrestore(&chv_lock, flags);
+
        return 0;
 }
 #endif


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