In commit 3e482859f1ef ("dts: qcom: sdm845: Add dt entries
to support crypto engine."), we decided to use the value indicated
by constant RPMH_CE_CLK rather than using it directly.
Now that the same RPMH clock value will also be used for other
SoCs (in addition to sdm845), let's use the constant
RPMH_CE_CLK to make sure that this dtsi is compatible with the
other qcom ones.
Cc: Thara Gopinath <thara.gopin...@linaro.org>
Cc: Bjorn Andersson <bjorn.anders...@linaro.org>
Cc: Rob Herring <robh...@kernel.org>
Cc: Andy Gross <agr...@kernel.org>
Cc: Herbert Xu <herb...@gondor.apana.org.au>
Cc: David S. Miller <da...@davemloft.net>
Cc: Stephen Boyd <sb...@kernel.org>
Cc: Michael Turquette <mturque...@baylibre.com>
Cc: linux-...@vger.kernel.org
Cc: linux-crypto@vger.kernel.org
Cc: devicet...@vger.kernel.org
Cc: linux-ker...@vger.kernel.org
Cc: bhupesh.li...@gmail.com
Signed-off-by: Bhupesh Sharma <bhupesh.sha...@linaro.org>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 454f794af547..54ba95dcb35a 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2304,7 +2304,7 @@ cryptobam: dma@1dc4000 {
compatible = "qcom,bam-v1.7.0";
reg = <0 0x01dc4000 0 0x24000>;
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&rpmhcc 15>;
+ clocks = <&rpmhcc RPMH_CE_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <0>;
@@ -2320,7 +2320,7 @@ crypto: crypto@1dfa000 {
reg = <0 0x01dfa000 0 0x6000>;
clocks = <&gcc GCC_CE1_AHB_CLK>,
<&gcc GCC_CE1_AHB_CLK>,
- <&rpmhcc 15>;
+ <&rpmhcc RPMH_CE_CLK>;
clock-names = "iface", "bus", "core";
dmas = <&cryptobam 6>, <&cryptobam 7>;
dma-names = "rx", "tx";
--
2.29.2
