[PATCH] crypto: qce - add CRYPTO_ALG_KERN_DRIVER_ONLY flag

[Eneas U de Queiroz]

Set the CRYPTO_ALG_KERN_DRIVER_ONLY flag to all algorithms exposed by
the qce driver, since they are all hardware accelerated, accessible
through a kernel driver only, and not available directly to userspace.

Signed-off-by: Eneas U de Queiroz <cotequei...@gmail.com>

diff --git a/drivers/crypto/qce/ablkcipher.c b/drivers/crypto/qce/ablkcipher.c
index 7a98bf5cc967..f0b59a8bbed0 100644
--- a/drivers/crypto/qce/ablkcipher.c
+++ b/drivers/crypto/qce/ablkcipher.c
@@ -380,7 +380,7 @@ static int qce_ablkcipher_register_one(const struct 
qce_ablkcipher_def *def,
 
        alg->cra_priority = 300;
        alg->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC |
-                        CRYPTO_ALG_NEED_FALLBACK;
+                        CRYPTO_ALG_NEED_FALLBACK | CRYPTO_ALG_KERN_DRIVER_ONLY;
        alg->cra_ctxsize = sizeof(struct qce_cipher_ctx);
        alg->cra_alignmask = 0;
        alg->cra_type = &crypto_ablkcipher_type;
diff --git a/drivers/crypto/qce/sha.c b/drivers/crypto/qce/sha.c
index 0853e74583ad..95ab16fc8fd6 100644
--- a/drivers/crypto/qce/sha.c
+++ b/drivers/crypto/qce/sha.c
@@ -495,7 +495,7 @@ static int qce_ahash_register_one(const struct 
qce_ahash_def *def,
        base = &alg->halg.base;
        base->cra_blocksize = def->blocksize;
        base->cra_priority = 300;
-       base->cra_flags = CRYPTO_ALG_ASYNC;
+       base->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_KERN_DRIVER_ONLY;
        base->cra_ctxsize = sizeof(struct qce_sha_ctx);
        base->cra_alignmask = 0;
        base->cra_module = THIS_MODULE;