On Mon, 12 Aug 2019 at 20:31, Nick Desaulniers <[email protected]> wrote:
>
> On Mon, Aug 12, 2019 at 10:22 AM Ard Biesheuvel
> <[email protected]> wrote:
> >
> > On Mon, 12 Aug 2019 at 19:50, Nick Desaulniers <[email protected]>
> > wrote:
> > >
> > > On Sun, Aug 11, 2019 at 3:59 PM Ard Biesheuvel
> > > <[email protected]> wrote:
> > > > diff --git a/crypto/Makefile b/crypto/Makefile
> > > > index 99a9fa9087d1..0d2cdd523fd9 100644
> > > > --- a/crypto/Makefile
> > > > +++ b/crypto/Makefile
> > > > @@ -98,7 +98,14 @@ CFLAGS_aegis128-neon-inner.o +=
> > > > -mfpu=crypto-neon-fp-armv8
> > > > aegis128-$(CONFIG_CRYPTO_AEGIS128_SIMD) += aegis128-neon.o
> > > > aegis128-neon-inner.o
> > > > endif
> > > > ifeq ($(ARCH),arm64)
> > > > -CFLAGS_aegis128-neon-inner.o += -ffreestanding -mcpu=generic+crypto
> > > > +aegis128-cflags-y := -ffreestanding -mcpu=generic+crypto
> > > > +aegis128-cflags-$(CONFIG_CC_IS_GCC) += -ffixed-q16 -ffixed-q17
> > > > -ffixed-q18 \
> > > > + -ffixed-q19 -ffixed-q20
> > > > -ffixed-q21 \
> > > > + -ffixed-q22 -ffixed-q23
> > > > -ffixed-q24 \
> > > > + -ffixed-q25 -ffixed-q26
> > > > -ffixed-q27 \
> > > > + -ffixed-q28 -ffixed-q29
> > > > -ffixed-q30 \
> > > > + -ffixed-q31
> > >
> > > I've filed https://bugs.llvm.org/show_bug.cgi?id=42974 for a feature
> > > request for this in Clang.
> > >
> >
> > Good. But even GCC has issues here. Most notably, something like
> >
> > register uint8x16_t foo asm ("v16");
> >
> > should permit a register that is excluded from general allocation to
> > be used explicitly, but this throws a warning on GCC and an error with
> > Clang.
>
> Consider filing bugs against GCC's issue tracker so that they're aware
> of the issue if you think there's more that can be improved on their
> end (for bugs in Clang, I'm always happy to help submit bug reports).
> What is the warning?
>
Cheers.
With Clang, I get
$ clang -target aarch64-linux-gnu -S -o - -O2 neon.c
neon.c:4:1: error: bad type for named register variable
register uint8x16_t foo asm ("v0");
^
1 error generated.
but given that -fixed-vNN is not implemented either, this is not
unexpected. But the latter is much more useful if the former is
supported as well.
I can't actually get the GCC warning to reproduce, so it might have
been operator error :-) But if I define the sbox like this
register uint8x16x4_t sbox0 asm ("v16");
register uint8x16x4_t sbox1 asm ("v20");
register uint8x16x4_t sbox2 asm ("v24");
register uint8x16x4_t sbox3 asm ("v28");
and use it in the sbox substitution, GCC emits lots of code like
2bc: 4eb01e08 mov v8.16b, v16.16b
2c0: 4eb11e29 mov v9.16b, v17.16b
2c4: 4eb21e4a mov v10.16b, v18.16b
2c8: 4eb31e6b mov v11.16b, v19.16b
..
2d4: 4e0e610e tbl v14.16b, {v8.16b-v11.16b}, v14.16b
2d8: 4e0d610d tbl v13.16b, {v8.16b-v11.16b}, v13.16b
i.e., it moves the register contents around rather than use it in the
tbl/tbx instructions directly, and the resulting code is absolutely
dreadful.
I will bring this up with the GCC developers, but it might be more
useful to grab someone internally rather than go via the bugzilla.
> for -ffixed-q* and `asm ("v16")`, on aarch64, what are the q registers
> and v registers? I assume they're related to NEON, but I'd only even
> worked with w* and x* GPRs. I *think* the explicit register syntax
> works for GPRs in Clang; maybe the v* and q* registers being broken is
> just oversight and can be fixed.
>
Yes. NEON/FP registers are referenced in different ways based on context:
v0.16b, v0.8h, v0.4s, v0.2d for SIMD bytes, halfwords, single words double words
q0/d0/s0 etc for scalar 128/64/32 bit FP
> > > With those 2 recommendations:
> > > Acked-by: Nick Desaulniers <[email protected]>
> > > in regards to compiling w/ Clang. Someone else should review the
> > > implementation of this crypto routine.
> --
> Thanks,
> ~Nick Desaulniers
