The DCP block on 6ull has no major differences other than requiring
explicit clock enabling.

Signed-off-by: Leonard Crestez <leonard.cres...@nxp.com>
---
 arch/arm/boot/dts/imx6ull.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index 796ed35d4ac9..be610339e933 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -37,10 +37,20 @@
                        #address-cells = <1>;
                        #size-cells = <1>;
                        reg = <0x02200000 0x100000>;
                        ranges;
 
+                       dcp: dcp@2280000 {
+                               compatible = "fsl,imx6ull-dcp", "fsl,imx28-dcp";
+                               reg = <0x02280000 0x4000>;
+                               interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX6ULL_CLK_DCP_CLK>;
+                               clock-names = "dcp";
+                       };
+
                        iomuxc_snvs: iomuxc-snvs@2290000 {
                                compatible = "fsl,imx6ull-iomuxc-snvs";
                                reg = <0x02290000 0x4000>;
                        };
 
-- 
2.17.1

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