On Wed, May 23, 2018 at 02:32:40PM +0300, Horia Geantă wrote:
> Management Complex (MC) f/w detection is based on CTPR_MS[DPAA2] bit.
> 
> This is incorrect since:
> -the bit is set for all CAAM blocks integrated in SoCs with a certain
> Layerscape Chassis
> -some SoCs with LS Chassis don't have an MC block (thus no MC f/w)
> 
> To fix this, MC f/w detection will be based on the presence of
> "fsl,qoriq-mc" compatible string in the device tree.
> 
> Fixes: 297b9cebd2fc0 ("crypto: caam/jr - add support for DPAA2 parts")
> Signed-off-by: Horia Geantă <horia.gea...@nxp.com>

All applied.  Thanks.
-- 
Email: Herbert Xu <herb...@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
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