On 03/06/06 14:43 +0400, Evgeniy Polyakov wrote: > On Sat, Jun 03, 2006 at 09:07:52AM +1000, Herbert Xu ([EMAIL PROTECTED]) > wrote: > > On Fri, Jun 02, 2006 at 05:23:41PM +0000, Jordan Crouse wrote: > > > > > > + /* According to the silicon developers, the status will only > > > + * fail to clear on an catastrophic failure, so an infinite > > > + * loop is valid here > > > + */ > > > + > > > + do > > > + status = AREAD(AES_INTR_REG); > > > + while(!(status & AES_INTRA_PENDING)); > > > > Is the chip capable of notifying completion via an interrupt? > > Even if it can, it is impossible to use with cryptoapi in atomic contexts. > In process context it might be a slepp though.
It can notify completion via an interrupt, but we have found that unless the block lengths are huge, the latency of taking the interrupt and handling it is somewhat slower then just polling. It might be a good idea to separate this out and provide two entry points, one for atomic/polling, and the other for processes that can or want to sleep and wait for completion. Jordan -- Jordan Crouse Senior Linux Engineer AMD - Personal Connectivity Solutions Group <www.amd.com/embeddedprocessors> - To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
