On Tue, 2006-25-04 at 08:17 +1000, Herbert Xu wrote: > On Mon, Apr 24, 2006 at 02:15:37PM -0400, jamal wrote: > > > > So overall, I am not too impressed with performance on the DP310. > > Hmm, did you try binding the interrupt to individual CPUs? That's pretty > important for performance. >
I tried it - doesnt help. In general it doesnt harm to bind but is not a guarantee. My observation with NAPI though is it doesnt make much of a difference actually given NAPI virtually "binds" an interface to a CPU; unless: - you have a bad interrupt distribution in which case binding helps ensure not everything goes to the same CPU. The C3 is very good - or a good APIC + a large of cache ex. in the range of 1MB cache - the c3 has only 64KB. There is still quiet a few things like the route cache that are shared by the CPUs; so ping-ponging is unavoidable. The cases where i observed degraded performance from binding are I think in celerons and earlier XEONs. I also tried tying both to a single CPU showed degraded performance as well - which means a single CPU wasnt capable of handling 170Mbps. I think i was still able to do total 120Mbps or so. cheers, jamal - To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
