Progress:
 * UM-2 [QEMU upstream maintainership]
  - more code review and pullreq wrangling

 * QEMU-598 [Model the MPS3-AN536 dual-Cortex-R52 FPGA image]
  - Wrote code to create the CPUs and the GIC and the UARTs.
    (Decided in the end not to try to create an a15mpcore-style
    wrapper device for the CPUs and GIC, because the need to
    have per-CPU RAM and UARTs makes that a bit awkward.)
  - Got to a working implementation which can boot the selftest
    binary and run those parts of the selftest which we expect
    to work. Also will boot a Linux kernel (support for R52 is
    not upstream but there are public mailing list patches).
  - Started on tidying up the patchset and finishing off the
    loose ends to get it into a state where it can be sent out:
    hope to be able to do that first half of next week.

-- PMM
_______________________________________________
linaro-toolchain mailing list -- linaro-toolchain@lists.linaro.org
To unsubscribe send an email to linaro-toolchain-le...@lists.linaro.org

Reply via email to