Investigated and produced and patch for bug lp936863.
Continued work on 64-bit shifts. I updated my neon shifts patch twice: 
once to take -Os optimization into account, and once because I noticed 
that the CC clobbers were being retained even after they were known to 
be not required, and presumably this could be a bad thing.
Posted a patch to improve SI->DImode sign- and zero-extends that also 
move values from core registers to neon registers.
Wrote a patch to implement negation in neon register, albeit at the cost 
of a scratch register to hold the constant zero. This worked, but 
insisted on loading the zero from memory, despite the fact that NEON has 
a suitable instruction for loading zero.
Attempted to get "vmov dN, #0" to work. The problem appears to be that 
DImode loads are handled by the VFP load pattern in vfp.md and that that 
doesn't seem to DTRT for integer constants. I've got as far as trying to 
figure out what it does do, but there's more to be done to get to the 
bottom of the problem.
Tried to get the benchmarking going for 64-bit shifts. Unfortunately 
ursa1 has been experiencing outages. Michael has been trying to fix it, 
but so far I've not been able to run anything there. Instead, I've 
launched benchmark runs via Michael's normal test infrastructure. 
Hopefully this can replace the manual ones anyway. That would be more 
convenient.
_______________________________________________
linaro-toolchain mailing list
linaro-toolchain@lists.linaro.org
http://lists.linaro.org/mailman/listinfo/linaro-toolchain

Reply via email to