On 29/05/11 22:17, Michael Hope wrote:
Hi Richard, Ramana.  FYI, trunk currently fails to bootstrap on ARM:

../../../gcc-4.7~/libcpp/expr.c: In function 'cpp_num_sign_extend':
../../../gcc-4.7~/libcpp/expr.c:1321:1: error: could not split insn
(insn:TI 53 49 92 6 (set (reg:DI 10 sl [orig:151 num$high ] [151])
         (ior:DI (not:DI (reg:DI 2 r2 [171]))
             (reg:DI 10 sl [orig:151 num$high ] [151])))
../../../gcc-4.7~/libcpp/expr.c:1310 869 {orndi3_neon}
      (nil))
../../../gcc-4.7~/libcpp/expr.c:1321:1: internal compiler error: in
final_scan_insn, at final.c:272

This is a patch I'm testing tonight for this - It's passed bootstrap in ARM and Thumb states beyond where it was failing this morning (it's running on ursa2 and on my panda board at the minute.)

Ramana
Index: gcc/config/arm/neon.md
===================================================================
--- gcc/config/arm/neon.md      (revision 174266)
+++ gcc/config/arm/neon.md      (working copy)
@@ -801,15 +801,40 @@
   [(set_attr "neon_type" "neon_int_1")]
 )
 
-(define_insn "orndi3_neon"
+;; TODO: investigate whether we should disable 
+;; this and bicdi3_neon for the A8 in line with the other
+;; changes above.
+(define_insn_and_split "orndi3_neon"
   [(set (match_operand:DI 0 "s_register_operand" "=w,?=&r,?&r")
        (ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "w,0,r"))
                (match_operand:DI 1 "s_register_operand" "w,r,0")))]
   "TARGET_NEON"
   "@
-   vorn\t%P0, %P1, %P2
-   #
-   #"
+  vorn\t%P0, %P1, %P2
+  #
+  #"
+  "reload_completed && 
+  (TARGET_NEON && ! (IS_VFP_REGNUM (REGNO (operands[0]))))"
+  [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1)))
+   (set (match_dup 3) (ior:SI (not:SI (match_dup 4)) (match_dup 5)))]
+  "
+  {
+    if (TARGET_THUMB2)
+      {
+       operands[3] = gen_highpart (SImode, operands[0]);
+       operands[0] = gen_lowpart (SImode, operands[0]);
+       operands[4] = gen_highpart (SImode, operands[2]);
+       operands[2] = gen_lowpart (SImode, operands[2]);
+       operands[5] = gen_highpart (SImode, operands[1]);
+       operands[1] = gen_lowpart (SImode, operands[1]);
+      }
+    else
+     {
+        emit_insn (gen_one_cmpldi2 (operands[0], operands[2]));
+        emit_insn (gen_iordi3 (operands[0], operands[1], operands[0]));
+        DONE;
+     }
+  }"
   [(set_attr "neon_type" "neon_int_1,*,*")
    (set_attr "length" "*,8,8")]
 )
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