== Last week == * PR48250, rehaul arm_legitimize_reload_address(). Richard Sandiford caught a bug of mine where I overlooked the valid index range of NEON quad-word load/stores. Quickly whipped up a fix, soon approved and committed upstream.
* LP #744754, ICE in NEON struct-mode auto-inc-dec MEMs. Pushed upstream patch for a merge to Linaro 4.5. * PR46888, bit-field insert optimization patch. Resumed investigating, mailed Andrew Pinski for more information on that REG_EQUAL note issue he mentioned on gcc-patches; can't quite reproduce it myself. * CoreMark ARMv6/v7 regressions: posted a patch set to gcc-patches. Still waiting review. * Reported to Bernd and AndrewS on an issue (LP #748138) which seems to be related to the shrink-wrap patch. This ICE does not seem to be avoided by doing -fno-shrink-wrap. * A few tasks related to Linaro-Budapest event travel. == This week == * Do the merge of the new combine patches to Linaro, and test. * LP #689887 is still in progress. * Hope to experiment with a few more optimization ideas. _______________________________________________ linaro-toolchain mailing list linaro-toolchain@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-toolchain
