On 11/25/2016 04:22 PM, Xiang, Haihao wrote:
From: "peng.chen"<[email protected]>
These parameters can be used for all codecs
Signed-off-by: peng.chen<[email protected]>
Signed-off-by: Xiang, Haihao<[email protected]>
---
src/i965_encoder.c | 40 ++++++++++++++++++++++++++++++++++++++++
src/i965_encoder.h | 6 ++++++
2 files changed, 46 insertions(+)
diff --git a/src/i965_encoder.c b/src/i965_encoder.c
index 4ef92eb..4a90dd4 100644
--- a/src/i965_encoder.c
+++ b/src/i965_encoder.c
@@ -438,6 +438,35 @@ intel_encoder_check_framerate_parameter(VADriverContextP
ctx,
}
}
+static void
+intel_encoder_check_roi_parameter(VADriverContextP ctx,
+ struct intel_encoder_context
*encoder_context,
+ VAEncMiscParameterBufferROI *misc)
+{
+ int i = 0;
+
+ encoder_context->brc.num_roi = MIN(misc->num_roi,
I965_MAX_NUM_ROI_REGIONS);
+ encoder_context->brc.roi_max_delta_qp = misc->max_delta_qp;
+ encoder_context->brc.roi_min_delta_qp = misc->min_delta_qp;
+ encoder_context->brc.roi_value_is_qp_delta = 0;
+
+ if (encoder_context->rate_control_mode != VA_RC_CQP)
+ encoder_context->brc.roi_value_is_qp_delta =
misc->roi_flags.bits.roi_value_is_qp_delta;
+
+ for (i = 0; i< encoder_context->brc.num_roi; i++) {
+ encoder_context->brc.roi[i].left = misc->roi->roi_rectangle.x;
+ encoder_context->brc.roi[i].right = encoder_context->brc.roi[i].left +
misc->roi->roi_rectangle.width;
+ encoder_context->brc.roi[i].top = misc->roi->roi_rectangle.y;
+ encoder_context->brc.roi[i].bottom = encoder_context->brc.roi[i].top +
misc->roi->roi_rectangle.height;
+ encoder_context->brc.roi[i].value = misc->roi->roi_value;
+
+ encoder_context->brc.roi[i].left /= 16;
+ encoder_context->brc.roi[i].right /= 16;
+ encoder_context->brc.roi[i].top /= 16;
+ encoder_context->brc.roi[i].bottom /= 16;
The above alignment is only for H264.
But for the other codec(for example: HEVC/VP9), it will use the
different alignment.
So I think that the above alignment had better be handled for specific
codec.
+ }
+}
+
static VAStatus
intel_encoder_check_brc_parameter(VADriverContextP ctx,
struct encode_state *encode_state,
@@ -481,6 +510,12 @@ intel_encoder_check_brc_parameter(VADriverContextP ctx,
(VAEncMiscParameterHRD
*)misc_param->data);
break;
+ case VAEncMiscParameterTypeROI:
+ intel_encoder_check_roi_parameter(ctx,
+ encoder_context,
+ (VAEncMiscParameterBufferROI
*)misc_param->data);
+ break;
+
default:
break;
}
@@ -1056,6 +1091,11 @@ intel_encoder_end_picture(VADriverContextP ctx,
encoder_context->mfc_pipeline(ctx, profile, encode_state,
encoder_context);
encoder_context->num_frames_in_sequence++;
encoder_context->brc.need_reset = 0;
+ /*
+ * ROI is only available for the current frame, see the comment
+ * for VAEncROI in va.h
+ */
+ encoder_context->brc.num_roi = 0;
return VA_STATUS_SUCCESS;
}
diff --git a/src/i965_encoder.h b/src/i965_encoder.h
index ba31364..fe5a595 100644
--- a/src/i965_encoder.h
+++ b/src/i965_encoder.h
@@ -84,6 +84,12 @@ struct intel_encoder_context
unsigned int hrd_buffer_size;
unsigned int hrd_initial_buffer_fullness;
unsigned int need_reset;
+
+ unsigned int num_roi;
+ unsigned int roi_max_delta_qp;
+ unsigned int roi_min_delta_qp;
+ unsigned int roi_value_is_qp_delta;
+ struct intel_roi roi[I965_MAX_NUM_ROI_REGIONS];
} brc;
void *vme_context;
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