On Mittwoch, 12. April 2017 00:24:21 CEST Doug Moore wrote: > The libunwind cache is based on hashing an instruction pointer (IP) value. > On a cache miss, the exploration for the right stack-popping info may come > down to a search of intervals defined by an eh_frame_hdr, so that the > interval found to include this IP could also include lots of neighboring > instructions, which would also lead to cache misses, if we ever looked them > up. I’m wondering whether it's worth considering a change to the caching > mechanism so that instead of using a hash table, it used some ordered data > structure (binary tree, skip list, etc) of intervals, not IPs, so that > there would be at most one cache miss per interval. > > Is there a problem in my thinking here? If not, is the libunwind world > generally friendly or hostile to such a change?
From a user POV, this sounds interesting and quickly thinking about it I can't directly find an issue with it. If you have a patch available, I'm willing to test it and compare its performance impact to the baseline. Cheers -- Milian Wolff [email protected] http://milianw.de
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