From: Vicente Olivert Riera <[email protected]> MIPS R6 does not have the load/store-left/right family of instructions, and requires the system to support misaligned memory access, so that code is not needed (and also wouldn't work) for MIPS R6. Make sure it's only executed for MIPS R1 or R2.
Signed-off-by: Vicente Olivert Riera <[email protected]> Signed-off-by: Luca Barbato <[email protected]> --- libavutil/mips/intreadwrite.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/libavutil/mips/intreadwrite.h b/libavutil/mips/intreadwrite.h index 4dabbe6..0db3da5 100644 --- a/libavutil/mips/intreadwrite.h +++ b/libavutil/mips/intreadwrite.h @@ -24,7 +24,13 @@ #include <stdint.h> #include "config.h" -#if ARCH_MIPS64 && HAVE_INLINE_ASM +/* + * GCC actually handles unaligned accesses correctly in all cases + * except, absurdly, 32-bit loads on mips64. + * + * https://git.libav.org/?p=libav.git;a=commit;h=b82b49a5b774b6ad9119e981c72b8f594fee2ae0 + */ +#if HAVE_MIPS64R2_INLINE || HAVE_MIPS64R1_INLINE #define AV_RN32 AV_RN32 static av_always_inline uint32_t AV_RN32(const void *p) @@ -41,6 +47,6 @@ static av_always_inline uint32_t AV_RN32(const void *p) return v; } -#endif /* ARCH_MIPS64 && HAVE_INLINE_ASM */ +#endif /* HAVE_MIPS64R2_INLINE || HAVE_MIPS64R1_INLINE */ #endif /* AVUTIL_MIPS_INTREADWRITE_H */ -- 2.5.0 _______________________________________________ libav-devel mailing list [email protected] https://lists.libav.org/mailman/listinfo/libav-devel
