2f13eb7c580fcbe3d73ebbe6fb1841381cad0a05
59103caa6839592788e7ad58b35863aac034631a
5e3b4a15dd8da6bded2092694c8db3b505cbf711
f1ac10c24efbbcba0f8dae37ee90d45847f5c5af
v4.16
** Changed in: intel
Status: New => Fix Released
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https://bugs.launchpad.net/bugs/1848977
Title:
5-level paging: enable 5-level paging in hardware
Status in intel:
Fix Released
Status in linux package in Ubuntu:
Incomplete
Bug description:
Description:
Need add kernel configuration to enable this feature. Enable
CONFIG_X86_5LEVEL
Test process of 19.10
root@ubuntu:~/check_5level_page# cat /boot/config-5.4.0-rc2+ | grep
CONFIG_X86_5LEVEL
# CONFIG_X86_5LEVEL is not set
root@ubuntu:~/check_5level_page# cat /proc/cpuinfo | grep la57
root@ubuntu:~/check_5level_page#
The IOMMU hardware is also changing with 5-level paging. This item is to
track the work that needs to be done to update the IOMMU code for the new
5-level tables.
The IOMMU code is also substantially more abstracted than the plain
pagetable code, and it may be able to handle the extra level and
address space with few or no changes. It's possible this will simply
become a validation activity.
Target Release: 20.04
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