Public bug reported:

reproduce:
[root@reg-l-vrt-41018-010 ~]# /usr/bin/mlnx_qos -i ens8 -s 
vendor,ets,vendor,ets,ets,strict,ets,vendor -t 0,36,0,55,4,0,5,0
Netlink error: Bad value. see dmesg.

[root@reg-l-vrt-41018-010 ~]# dmesg
[69718.992299] mlx4_en: ens8: TC[0]: Not supported TSA: 255


There is a upstream commit that fix the issue, please add it to bionic 

commit a42b63c1ac1986f17f71bc91a6b0aaa14d4dae71  
Author: Moni Shoua <mo...@mellanox.com>          
Date:   Thu Dec 28 16:26:11 2017 +0200           

    net/mlx4_en: Change default QoS settings
                                            
    Change the default mapping between TC and TCG as follows:
                                                             
    Prio     |             TC/TCG                            
             |      from             to                      
             |    (set by FW)      (set by SW)               
    ---------+-----------------------------------            
    0        |      0/0              0/7                     
    1        |      1/0              0/6                     
    2        |      2/0              0/5                     
    3        |      3/0              0/4                     
    4        |      4/0              0/3                     
    5        |      5/0              0/2                     
    6        |      6/0              0/1                     
    7        |      7/0              0/0                     
                                                             
    These new settings cause that a pause frame for any prio stops
    traffic for all prios.                                        
                                                                  
    Fixes: 564c274c3df0 ("net/mlx4_en: DCB QoS support")          
    Signed-off-by: Moni Shoua <mo...@mellanox.com>                
    Signed-off-by: Maor Gottlieb <ma...@mellanox.com>             
    Signed-off-by: Tariq Toukan <tar...@mellanox.com>             
    Signed-off-by: David S. Miller <da...@davemloft.net>          

diff --git a/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c 
b/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c
index 5f41dc9..1a0c3bf8 100644                                                  
                            
--- a/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c                            
                            
+++ b/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c
@@ -310,6 +310,7 @@ static int mlx4_en_ets_validate(struct mlx4_en_priv *priv, 
struct ieee_ets *ets)
                }

                switch (ets->tc_tsa[i]) {
+         case IEEE_8021QAZ_TSA_VENDOR:
                case IEEE_8021QAZ_TSA_STRICT:
                        break;
                case IEEE_8021QAZ_TSA_ETS:
@@ -347,6 +348,10 @@ static int mlx4_en_config_port_scheduler(struct 
mlx4_en_priv *priv,
        /* higher TC means higher priority => lower pg */
        for (i = IEEE_8021QAZ_MAX_TCS - 1; i >= 0; i--) {
                switch (ets->tc_tsa[i]) {
+         case IEEE_8021QAZ_TSA_VENDOR:
+                 pg[i] = MLX4_EN_TC_VENDOR;
+                 tc_tx_bw[i] = MLX4_EN_BW_MAX;
+                 break;
                case IEEE_8021QAZ_TSA_STRICT:
                        pg[i] = num_strict++;
                        tc_tx_bw[i] = MLX4_EN_BW_MAX;
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c 
b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
index 99051a2..21bc17f 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
@@ -3336,6 +3336,13 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int 
port,
        priv->msg_enable = MLX4_EN_MSG_LEVEL;
 #ifdef CONFIG_MLX4_EN_DCB
        if (!mlx4_is_slave(priv->mdev->dev)) {
+         u8 prio;
+
+         for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) {
+                 priv->ets.prio_tc[prio] = prio;
+                 priv->ets.tc_tsa[prio]  = IEEE_8021QAZ_TSA_VENDOR;
+         }
+
                priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |
                        DCB_CAP_DCBX_VER_IEEE;
                priv->flags |= MLX4_EN_DCB_ENABLED;
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h 
b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
index 2b72677..7db3d0d 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
@@ -479,6 +479,7 @@ struct mlx4_en_frag_info {
 #define MLX4_EN_BW_MIN 1
 #define MLX4_EN_BW_MAX 100 /* Utilize 100% of the line */

+#define MLX4_EN_TC_VENDOR 0
 #define MLX4_EN_TC_ETS 7

 enum dcb_pfc_type {

** Affects: linux (Ubuntu)
     Importance: Undecided
         Status: New

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https://bugs.launchpad.net/bugs/1758662

Title:
  [Bionic] mlx4 ETH - mlnx_qos failed when set some TC to vendor

Status in linux package in Ubuntu:
  New

Bug description:
  reproduce:
  [root@reg-l-vrt-41018-010 ~]# /usr/bin/mlnx_qos -i ens8 -s 
vendor,ets,vendor,ets,ets,strict,ets,vendor -t 0,36,0,55,4,0,5,0
  Netlink error: Bad value. see dmesg.

  [root@reg-l-vrt-41018-010 ~]# dmesg
  [69718.992299] mlx4_en: ens8: TC[0]: Not supported TSA: 255

  
  There is a upstream commit that fix the issue, please add it to bionic 

  commit a42b63c1ac1986f17f71bc91a6b0aaa14d4dae71  
  Author: Moni Shoua <mo...@mellanox.com>          
  Date:   Thu Dec 28 16:26:11 2017 +0200           

      net/mlx4_en: Change default QoS settings
                                              
      Change the default mapping between TC and TCG as follows:
                                                               
      Prio     |             TC/TCG                            
               |      from             to                      
               |    (set by FW)      (set by SW)               
      ---------+-----------------------------------            
      0        |      0/0              0/7                     
      1        |      1/0              0/6                     
      2        |      2/0              0/5                     
      3        |      3/0              0/4                     
      4        |      4/0              0/3                     
      5        |      5/0              0/2                     
      6        |      6/0              0/1                     
      7        |      7/0              0/0                     
                                                               
      These new settings cause that a pause frame for any prio stops
      traffic for all prios.                                        
                                                                    
      Fixes: 564c274c3df0 ("net/mlx4_en: DCB QoS support")          
      Signed-off-by: Moni Shoua <mo...@mellanox.com>                
      Signed-off-by: Maor Gottlieb <ma...@mellanox.com>             
      Signed-off-by: Tariq Toukan <tar...@mellanox.com>             
      Signed-off-by: David S. Miller <da...@davemloft.net>          

  diff --git a/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c 
b/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c
  index 5f41dc9..1a0c3bf8 100644                                                
                              
  --- a/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c                          
                              
  +++ b/drivers/net/ethernet/mellanox/mlx4/en_dcb_nl.c
  @@ -310,6 +310,7 @@ static int mlx4_en_ets_validate(struct mlx4_en_priv 
*priv, struct ieee_ets *ets)
                  }

                  switch (ets->tc_tsa[i]) {
  +         case IEEE_8021QAZ_TSA_VENDOR:
                  case IEEE_8021QAZ_TSA_STRICT:
                          break;
                  case IEEE_8021QAZ_TSA_ETS:
  @@ -347,6 +348,10 @@ static int mlx4_en_config_port_scheduler(struct 
mlx4_en_priv *priv,
          /* higher TC means higher priority => lower pg */
          for (i = IEEE_8021QAZ_MAX_TCS - 1; i >= 0; i--) {
                  switch (ets->tc_tsa[i]) {
  +         case IEEE_8021QAZ_TSA_VENDOR:
  +                 pg[i] = MLX4_EN_TC_VENDOR;
  +                 tc_tx_bw[i] = MLX4_EN_BW_MAX;
  +                 break;
                  case IEEE_8021QAZ_TSA_STRICT:
                          pg[i] = num_strict++;
                          tc_tx_bw[i] = MLX4_EN_BW_MAX;
  diff --git a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c 
b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
  index 99051a2..21bc17f 100644
  --- a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
  +++ b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
  @@ -3336,6 +3336,13 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int 
port,
          priv->msg_enable = MLX4_EN_MSG_LEVEL;
   #ifdef CONFIG_MLX4_EN_DCB
          if (!mlx4_is_slave(priv->mdev->dev)) {
  +         u8 prio;
  +
  +         for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) {
  +                 priv->ets.prio_tc[prio] = prio;
  +                 priv->ets.tc_tsa[prio]  = IEEE_8021QAZ_TSA_VENDOR;
  +         }
  +
                  priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |
                          DCB_CAP_DCBX_VER_IEEE;
                  priv->flags |= MLX4_EN_DCB_ENABLED;
  diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h 
b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
  index 2b72677..7db3d0d 100644
  --- a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
  +++ b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
  @@ -479,6 +479,7 @@ struct mlx4_en_frag_info {
   #define MLX4_EN_BW_MIN 1
   #define MLX4_EN_BW_MAX 100 /* Utilize 100% of the line */

  +#define MLX4_EN_TC_VENDOR 0
   #define MLX4_EN_TC_ETS 7

   enum dcb_pfc_type {

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