This bug is awaiting verification that the kernel in -proposed solves
the problem. Please test the kernel and update this bug with the
results. If the problem is solved, change the tag 'verification-needed-
zesty' to 'verification-done-zesty'. If the problem still exists, change
the tag 'verification-needed-zesty' to 'verification-failed-zesty'.

If verification is not done by 5 working days from today, this fix will
be dropped from the source code, and this bug will be closed.

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to enable and use -proposed. Thank you!


** Tags added: verification-needed-zesty

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https://bugs.launchpad.net/bugs/1689661

Title:
  No PMU support for ACPI-based arm64 systems

Status in linux package in Ubuntu:
  Fix Committed
Status in linux source package in Zesty:
  Fix Committed

Bug description:
  [Impact]
  ACPI-based arm64 systems, such as the Qualcomm QDF2400 and the Hisilicon D05, 
do not currently have PMU support. This means that tools like perf are unable 
to use the built-in hardware event counters.

  [Test Case]
  On an ACPI-based arm64 system, run the following commands:

  sudo perf list pmu
  sudo perf list hw

  Without ACPI PMU support, these will be empty.

  [Regression Risk]
  The changes are restricted to ARM-specific code, other than an added enum 
value in linux/cpuhotplug.h. This reduces the non-negligible regression risk to 
the ARM architecture.

  For ACPI-based ARM platforms, regression risk is limited because they
  did not have PMU support previously. However, if this code is buggy,
  previously working commands that just made use of non-PMU events (e.g.
  perf top) might start causing problems. To mitigate this, I did a
  perf_fuzzer run on a QDF2400 (ACPI-based) and confirmed it survived
  (Note: this included a workaround for LP: #1689855, which will need to
  be fixed separately once upstreamed).

  For non-ACPI-based (i.e. devicetree) ARM platforms, there is a chance
  that the changes have broken PMU support. To mitigate that, I also did
  a perf_fuzzer run on a Cavium ThunderX system booted in DT mode, which
  it survived.

  Finally, the non-perf related changes in this series are restricted to
  a change in arch/arm64/kernel/smp.c that saves off pointers to each
  CPU's MADT GICC tables. The code is populating a static array with
  existing data - so pretty low risk (no pointer dereferences, etc).

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