https://bugs.kde.org/show_bug.cgi?id=429285

            Bug ID: 429285
           Summary: mips: Add support Loongson special instruction
           Product: valgrind
           Version: unspecified
          Platform: Other
                OS: Linux
            Status: REPORTED
          Severity: normal
          Priority: NOR
         Component: vex
          Assignee: jsew...@acm.org
          Reporter: suxingx...@loongson.cn
  Target Milestone: ---

SUMMARY
mips: Add support Loongson special instruction 

Implement Loonson MIPS specific instructions :

 Multiplication, the result is written to the general purpose register:
        GSMULT, GSDMULT, GSMULTU, GSDMULTU
 Division, quotient write general purpose register:
        GSDIV, GSDDIV, GSDIVU, GSDDIVU
 Division, remainder writes to the general purpose register:
        GSMOD, GSDMOD, GSMODU, GSDMODU
 Logical right shift:
        PSLLW, PSLLH, PSRLH, PSRLW
 Arithmetic right shift:
        PSRAW
 After register fs is negated, register ft is bitwise and:
        PANDN
 Unpack:
        PUNPCKHHW, PUNPCKLBH, PUNPCKHBH
 Low 32 bits combined into 64 bits:
        PUNPCKLWD
 High 32 bits combined into 64 bits:
        PUNPCKHWD
 Take word with offset:
        GSLDX, GSLBX, GSLHX, GSLWX
 Memory bytes with offset:
        GSSDX, GSSBX, GSSHX, GSSWX      
 Dual source register stores words:
        GSSQ, GSSQC1
 Dual source register take words:
        GSLQ

This patch must be committed after 
https://bugs.kde.org/show_bug.cgi?id=429282

STEPS TO REPRODUCE
1. make and make install
2. gcc testcase.c -o testcase -g -march=loongson3a
3. run ./valgrind testcase

OBSERVED RESULT


EXPECTED RESULT


SOFTWARE/OS VERSIONS
Windows: 
macOS: 
Linux/KDE Plasma: 
(available in About System)
KDE Plasma Version: 
KDE Frameworks Version: 
Qt Version: 

ADDITIONAL INFORMATION

$ cat /proc/cpuinfo 
system type             : generic-loongson-machine
machine                 : loongson,generic
processor               : 0
cpu model               : ICT Loongson-3 V0.4  FPU V0.1
model name              : Loongson-3A R4 (Loongson-3A4000)
CPU MHz                 : 1800.00
BogoMIPS                : 3594.02
wait instruction        : yes
microsecond timers      : yes
tlb_entries             : 2112
extra interrupt vector  : yes
hardware watchpoint     : yes, count: 0, address/irw mask: []
isa                     : mips1 mips2 mips3 mips4 mips5 mips32r1 mips32r2
mips64r1 mips64r2

For more instruction information view :
http://www.loongson.cn/uploadfile/cpu/3A3000/Loongson3A3000_3B3000user2.pdf

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