https://bugs.kde.org/show_bug.cgi?id=417187
--- Comment #9 from Julian Seward <jsew...@acm.org> --- (In reply to Stefan Maksimovic from comment #8) > > We pretty much agree with your analysis [..] Good! So .. last Sunday, in discussion at Fosdem, one of the three of you (not sure who) suggested that this might be fixed as follows (at least, this is what I interpreted the idea to mean): in disInstr_MIPS, if the insn to be disassembled is a branch, then *also* disassemble the following instruction at the same time, hence providing IR for both instructions together. In effect this would mean that disInstr_MIPS usually "moves forward" 4 bytes, but sometimes 8 bytes. Does that make any sense? Would that help? Right now I can't think of any other fix. What happens if the instruction in a delay slot is itself a branch, though? Is that allowed? Is it a situation you need to handle? -- You are receiving this mail because: You are watching all bug changes.
