https://bugs.kde.org/show_bug.cgi?id=344802

--- Comment #16 from John Reiser <jrei...@bitwagon.com> ---
(In reply to Matt Cowell from comment #13)
> Created attachment 101694 [details]
> Add decode for CNTVCT, CNTPCT, and CNTFRQ
Today the patch now lives at https://bugsfiles.kde.org/attachment.cgi?id=101694
and does apply, with offsets:
$ patch -p1 <344802-101694.patch
patching file VEX/priv/guest_arm_defs.h
Hunk #1 succeeded at 350 (offset 112 lines).
patching file VEX/priv/guest_arm_helpers.c
Hunk #1 succeeded at 1445 (offset 258 lines).
patching file VEX/priv/guest_arm_toIR.c
Hunk #1 succeeded at 18755 (offset 1500 lines).
Hunk #2 succeeded at 23277 (offset 1548 lines).

However the patch does not compile on arm64(aarch64):
priv/guest_arm_helpers.c: In function ‘arm_dirtyhelper_MRRS_CNTVCT’:
priv/guest_arm_helpers.c:1458:4: error: invalid 'asm': invalid operand prefix
'%Q'
    __asm__ __volatile__("mrrc p15, 1, %Q0, %R0, c14" : "=r"(w));
    ^~~~~~~
priv/guest_arm_helpers.c:1458:4: error: invalid 'asm': incompatible floating
point / vector register operand for '%R'

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