On Wed, Mar 23, 2022 at 09:49:04AM +0000, Marc Zyngier wrote: > On Tue, 22 Mar 2022 17:27:36 +0000, > Robin Murphy <[email protected]> wrote: > > > > Originally, creating the dma_ranges resource list in pre-sorted fashion > > was the simplest and most efficient way to enforce the order required by > > iova_reserve_pci_windows(). However since then at least one PCI host > > driver is now re-sorting the list for its own probe-time processing, > > which doesn't seem entirely unreasonable, so that basic assumption no > > longer holds. Make iommu-dma robust and get the sort order it needs by > > explicitly sorting, which means we can also save the effort at creation > > time and just build the list in whatever natural order the DT had. > > > > Signed-off-by: Robin Murphy <[email protected]> > > --- > > > > Looking at this area off the back of the XGene thread[1] made me realise > > that we need to do it anyway, regardless of whether it might also happen > > to restore the previous XGene behaviour or not. Presumably nobody's > > tried to use pcie-cadence-host behind an IOMMU yet... > > This definitely restores PCIe functionality on my Mustang (XGene-1). > Hopefully dann can comment on whether this addresses his own issue, as > his firmware is significantly different.
Robin, Marc, Adding just this patch on top of v5.17 (w/ vendor dtb) isn't enough to fix m400 networking: https://paste.ubuntu.com/p/H5ZNbRvP8V/ -dann _______________________________________________ iommu mailing list [email protected] https://lists.linuxfoundation.org/mailman/listinfo/iommu
