On Wed, Jan 13, 2016 at 1:28 PM, David Woodhouse <[email protected]> wrote: > On Mon, 2016-01-11 at 14:20 +0100, Jacek Lawrynowicz wrote: >> This patch solves IOMMU support issues with PCIe non-transparent bridges >> that use Requester ID look-up tables (LUT), e.g. PEX8733. Before exiting >> the bridge, packet's RID is rewritten according to LUT programmed by >> a driver. Modified packets are then passed to a destination bus and >> processed upstream. The problem is that such packets seem to come from >> non-existent nodes that are hidden behind NTB and are not discoverable >> by a destination node, so IOMMU discards them. Adding DMA alias for a >> given LUT entry allows IOMMU to create a proper mapping that enables >> inter-node communication. >> >> The current DMA alias implementation supports only single alias, so it's >> not possible to connect more than two nodes when IOMMU is enabled. This >> implementation enables all possible aliases on a given bus (256) that >> are stored in a bitset. Alias devfn is directly translated to a bit >> number. The bitset is not allocated for devices that have no need for >> DMA aliases. >> >> More details can be found in following article: >> http://www.plxtech.com/files/pdf/technical/expresslane/RTC_Enabling%20MulitHostSystemDesigns.pdf >> >> Signed-off-by: Jacek Lawrynowicz <[email protected]> > > Acked-by: David Woodhouse <[email protected]> > > Strictly speaking, this is more in PCI code than IOMMU code. And it > doesn't actually touch the Intel VT-d code at all; the subject is a bit > misleading. > > But I'm happy enough to add it to my intel-iommu tree if nobody else > picks it up. Bjorn?
Jacek, would you mind posting this to [email protected], please? Bjorn _______________________________________________ iommu mailing list [email protected] https://lists.linuxfoundation.org/mailman/listinfo/iommu
