Hi Will,
On Tue, Sep 02, 2014 at 10:53:36AM +0100, Will Deacon wrote:
> This is version three of the patches I originally posted here:
>
> RFCv1: http://permalink.gmane.org/gmane.linux.kernel.iommu/5552
> RFCv2: http://permalink.gmane.org/gmane.linux.kernel.iommu/5700
>
> Changes since RFCv2 include:
>
> - Dropped the RFC tag
> - Rebased onto 3.17-rc*
> - Iterate the support bus_types (currently just PCI) and check that
> nesting is actually supported
>
> The corresponding arm-smmu changes are included to show how the new
> domain attribute can be used.
How is this implemented in the SMMU, can there be only one stage2
mapping, so that a device can be passed through to a KVM guest or can
there be multiple stage2 mappings in parallel (like with PRI/PASID on
PCI) to support multiple translation contexts on one device?
Joerg
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