On Tue, Jul 12, 2016 at 10:13:48PM +0300, Ville Syrjälä wrote: > On Tue, Jul 12, 2016 at 05:47:02PM +0100, Chris Wilson wrote: > > On Tue, Jul 12, 2016 at 07:24:47PM +0300, [email protected] > > wrote: > > > From: Ville Syrjälä <[email protected]> > > > > > > Prior to gen6 we didn't have per-ring IMR registers, which means that > > > since commit 61ff75ac20ff ("drm/i915: Simplify enabling > > > user-interrupts with L3-remapping") we're now masking off all interrupts > > > when init_render_ring() gets called. > > > > That confused me, we're just writing to a non-existent register, so it > > shouldn't have any effect. > > RING_IMR(RCS) == 0x20a8 == IMR
Ah (I expected the global IIR et al not to be in the ring block). And since we unmask everything, nothing is broken at first glance. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
