Reviewed-by: Mika Kahola <[email protected]> On Tue, 2016-05-31 at 12:08 +0300, [email protected] wrote: > From: Ville Syrjälä <[email protected]> > > The VBT has these mysterious H/V image sizes as part of the display > timings. Looking at some dumps those appear to be the physical > dimensions in mm. Which makes sense since the timing descriptor matches > the format used by EDID detailed timing descriptor, which defines these > as "H/V Addressable Video Image Size in mm". > > So let's use that information from the panel fixed mode to get the > physical dimensions for LVDS/eDP/DSI displays. And with that we can > fill out the display_info so that userspace can get at it via > GetConnector. > > v2: Use (hi<<8)|lo instead of broken (hi<<4)+lo > Handle LVDS and eDP too > > Cc: Stephen Just <[email protected]> > Tested-by: Stephen Just <[email protected]> (v1) > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96255 > Signed-off-by: Ville Syrjälä <[email protected]> > --- > drivers/gpu/drm/i915/intel_bios.c | 5 +++++ > drivers/gpu/drm/i915/intel_dp.c | 5 ++++- > drivers/gpu/drm/i915/intel_dsi.c | 3 +++ > drivers/gpu/drm/i915/intel_lvds.c | 2 ++ > drivers/gpu/drm/i915/intel_vbt_defs.h | 7 ++++--- > 5 files changed, 18 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_bios.c > b/drivers/gpu/drm/i915/intel_bios.c > index 624e755e451f..2ddc469170cd 100644 > --- a/drivers/gpu/drm/i915/intel_bios.c > +++ b/drivers/gpu/drm/i915/intel_bios.c > @@ -139,6 +139,11 @@ fill_detail_timing_data(struct drm_display_mode > *panel_fixed_mode, > else > panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; > > + panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | > + dvo_timing->himage_lo; > + panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | > + dvo_timing->vimage_lo; > + > /* Some VBTs have bogus h/vtotal values */ > if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) > panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > index 096acbf04003..46f62beaf4fb 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -5370,8 +5370,11 @@ static bool intel_edp_init_connector(struct intel_dp > *intel_dp, > if (!fixed_mode && dev_priv->vbt.lfp_lvds_vbt_mode) { > fixed_mode = drm_mode_duplicate(dev, > dev_priv->vbt.lfp_lvds_vbt_mode); > - if (fixed_mode) > + if (fixed_mode) { > fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; > + connector->display_info.width_mm = fixed_mode->width_mm; > + connector->display_info.height_mm = > fixed_mode->height_mm; > + } > } > mutex_unlock(&dev->mode_config.mutex); > > diff --git a/drivers/gpu/drm/i915/intel_dsi.c > b/drivers/gpu/drm/i915/intel_dsi.c > index cbe2537f26f4..c70132aa91d5 100644 > --- a/drivers/gpu/drm/i915/intel_dsi.c > +++ b/drivers/gpu/drm/i915/intel_dsi.c > @@ -1578,6 +1578,9 @@ void intel_dsi_init(struct drm_device *dev) > goto err; > } > > + connector->display_info.width_mm = fixed_mode->width_mm; > + connector->display_info.height_mm = fixed_mode->height_mm; > + > intel_panel_init(&intel_connector->panel, fixed_mode, NULL); > > intel_dsi_add_properties(intel_connector); > diff --git a/drivers/gpu/drm/i915/intel_lvds.c > b/drivers/gpu/drm/i915/intel_lvds.c > index 56eb3bdcdb5c..62eaa895fe5b 100644 > --- a/drivers/gpu/drm/i915/intel_lvds.c > +++ b/drivers/gpu/drm/i915/intel_lvds.c > @@ -1082,6 +1082,8 @@ void intel_lvds_init(struct drm_device *dev) > fixed_mode = drm_mode_duplicate(dev, > dev_priv->vbt.lfp_lvds_vbt_mode); > if (fixed_mode) { > fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; > + connector->display_info.width_mm = fixed_mode->width_mm; > + connector->display_info.height_mm = > fixed_mode->height_mm; > goto out; > } > } > diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h > b/drivers/gpu/drm/i915/intel_vbt_defs.h > index 4f9799f025a9..68db9621f1f0 100644 > --- a/drivers/gpu/drm/i915/intel_vbt_defs.h > +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h > @@ -403,9 +403,10 @@ struct lvds_dvo_timing { > u8 vsync_off:4; > u8 rsvd0:6; > u8 hsync_off_hi:2; > - u8 h_image; > - u8 v_image; > - u8 max_hv; > + u8 himage_lo; > + u8 vimage_lo; > + u8 vimage_hi:4; > + u8 himage_hi:4; > u8 h_border; > u8 v_border; > u8 rsvd1:3;
-- Mika Kahola - Intel OTC _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
