Op 10-05-16 om 03:21 schreef Matt Roper:
> SKL-style platforms can't fully trust the watermark/DDB settings
> programmed by the BIOS and need to do extra sanitization on their first
> atomic update. Add a flag to dev_priv that is set during hardware
> readout and cleared at the end of the first commit.
>
> Note that for the somewhat common case where everything is turned off
> when the driver starts up, we don't need to bother with a recompute...we
> know exactly what the DDB should be (all zero's) so just setup the DDB
> directly in that case.
>
> Cc: Maarten Lankhorst <[email protected]>
> Signed-off-by: Matt Roper <[email protected]>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 7 +++++++
> drivers/gpu/drm/i915/intel_display.c | 7 +++++++
> drivers/gpu/drm/i915/intel_pm.c | 15 ++++++++++++++-
> 3 files changed, 28 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a67462a..27aaaca 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1993,6 +1993,13 @@ struct drm_i915_private {
> * cstate->wm.need_postvbl_update.
> */
> struct mutex wm_mutex;
> +
> + /*
> + * Set during HW readout of watermarks/DDB. Some platforms
> + * need to know when we're still using BIOS-provided values
> + * (which we don't fully trust).
> + */
> + bool distrust_bios_wm;
> } wm;
>
> struct i915_runtime_pm pm;
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 7acdfa3..3028bf4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13703,6 +13703,13 @@ static int intel_atomic_commit(struct drm_device
> *dev,
> dev_priv->display.optimize_watermarks(intel_cstate);
> }
>
> + /*
> + * We've now finished at least one atomic commit following hw readout,
> + * so any platforms that needed to do extra sanitization of watermarks
> + * should have done it by now.
> + */
> + dev_priv->wm.distrust_bios_wm = false;
I guess at this point atomic wm commit doesn't work yet?
When it does it should be put after swap_state, or kill it and rely on
skip_intermediate_wm. :)
> for_each_crtc_in_state(state, crtc, old_crtc_state, i) {
> intel_post_plane_update(to_intel_crtc_state(old_crtc_state));
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 90ba05c..e3877dc 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4021,11 +4021,24 @@ void skl_wm_get_hw_state(struct drm_device *dev)
> struct skl_ddb_allocation *ddb = &dev_priv->wm.skl_hw.ddb;
> struct drm_crtc *crtc;
> struct intel_crtc *intel_crtc;
> + bool any_on = false;
>
> skl_ddb_get_hw_state(dev_priv, ddb);
> - list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
> + list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
> skl_pipe_wm_get_hw_state(crtc);
>
> + if (crtc->state->active)
> + any_on = true;
> + }
> +
dev_priv->active_crtcs?
> + if (any_on) {
> + /* Fully recompute DDB on first atomic commit */
> + dev_priv->wm.distrust_bios_wm = true;
> + } else {
> + /* Easy/common case; just sanitize DDB now if everything off */
> + memset(ddb, 0, sizeof(*ddb));
> + }
> +
> /* Calculate plane data rates */
> for_each_intel_crtc(dev, intel_crtc) {
> struct intel_crtc_state *cstate = intel_crtc->config;
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