Tim Gore Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ
> -----Original Message----- > From: Mika Kuoppala [mailto:[email protected]] > Sent: Monday, January 25, 2016 2:39 PM > To: Gore, Tim; [email protected] > Cc: Gore, Tim; [email protected] > Subject: Re: [PATCH 1/3] drm/i915: add function for GT related workarounds > > [email protected] writes: > > > From: Tim Gore <[email protected]> > > > > Add a function that is a place for workarounds that are GT related but > > not required per ring. This function is called on driver load and also > > after a reset and on resume, so it is safe for workarounds that get > > clobbered in these situations. > > > > Signed-off-by: Tim Gore <[email protected]> > > --- > > drivers/gpu/drm/i915/i915_gem_gtt.c | 12 ++++++++++++ > > 1 file changed, 12 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c > > b/drivers/gpu/drm/i915/i915_gem_gtt.c > > index 7377b67..fe960d5 100644 > > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > > @@ -2132,6 +2132,16 @@ static void i915_address_space_init(struct > i915_address_space *vm, > > list_add_tail(&vm->global_link, &dev_priv->vm_list); } > > > > +void gtt_write_workarounds(struct drm_device *dev) { > > static void > > This can be squashed with 2/3. > > -Mika > Do you mean all squashed together, into a single patch? Tim > > + struct drm_i915_private *dev_priv = dev->dev_private; > > + > > + /* This function is for gtt related workarounds. This function is > > + * called on driver load and after a GPU reset, so you can place > > + * workarounds here even if they get overwritten by GPU reset. > > + */ > > +} > > + > > int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt > > *ppgtt) { > > struct drm_i915_private *dev_priv = dev->dev_private; @@ -2148,6 > > +2158,8 @@ int i915_ppgtt_init(struct drm_device *dev, struct > > i915_hw_ppgtt *ppgtt) > > > > int i915_ppgtt_init_hw(struct drm_device *dev) { > > + gtt_write_workarounds(dev); > > + > > /* In the case of execlists, PPGTT is enabled by the context > descriptor > > * and the PDPs are contained within the context itself. We don't > > * need to do anything here. */ > > -- > > 1.9.1 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
