On Mon, Nov 23, 2015 at 06:06:16PM +0200, [email protected] wrote: > From: Ville Syrjälä <[email protected]> > > ironlake_{enable,disable}_display_irq() each just call > ilk_update_display_irq() so let's make them static inlines. > > While at it s/ironlake/ilk/ to make things shorter, and a bit more > consistent with the ibx functions. > > Signed-off-by: Ville Syrjälä <[email protected]>
Yeah we might want to standarize on the TLA platform acronyms. And document that somewhere. Reviewed-by: Daniel Vetter <[email protected]> > --- > drivers/gpu/drm/i915/i915_drv.h | 17 +++++++++++++---- > drivers/gpu/drm/i915/i915_irq.c | 24 ++++++------------------ > drivers/gpu/drm/i915/intel_fifo_underrun.c | 8 ++++---- > 3 files changed, 23 insertions(+), 26 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 43087d513637..b9f86a73c543 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2749,10 +2749,19 @@ void valleyview_disable_display_irqs(struct > drm_i915_private *dev_priv); > void i915_hotplug_interrupt_update(struct drm_i915_private *dev_priv, > uint32_t mask, > uint32_t bits); > -void > -ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask); > -void > -ironlake_disable_display_irq(struct drm_i915_private *dev_priv, u32 mask); > +void ilk_update_display_irq(struct drm_i915_private *dev_priv, > + uint32_t interrupt_mask, > + uint32_t enabled_irq_mask); > +static inline void > +ilk_enable_display_irq(struct drm_i915_private *dev_priv, uint32_t bits) > +{ > + ilk_update_display_irq(dev_priv, bits, bits); > +} > +static inline void > +ilk_disable_display_irq(struct drm_i915_private *dev_priv, uint32_t bits) > +{ > + ilk_update_display_irq(dev_priv, bits, 0); > +} > void ibx_display_interrupt_update(struct drm_i915_private *dev_priv, > uint32_t interrupt_mask, > uint32_t enabled_irq_mask); > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index c8ba94968aaf..5aea557f3776 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -215,9 +215,9 @@ void i915_hotplug_interrupt_update(struct > drm_i915_private *dev_priv, > * @interrupt_mask: mask of interrupt bits to update > * @enabled_irq_mask: mask of interrupt bits to enable > */ > -static void ilk_update_display_irq(struct drm_i915_private *dev_priv, > - uint32_t interrupt_mask, > - uint32_t enabled_irq_mask) > +void ilk_update_display_irq(struct drm_i915_private *dev_priv, > + uint32_t interrupt_mask, > + uint32_t enabled_irq_mask) > { > uint32_t new_val; > > @@ -239,18 +239,6 @@ static void ilk_update_display_irq(struct > drm_i915_private *dev_priv, > } > } > > -void > -ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask) > -{ > - ilk_update_display_irq(dev_priv, mask, mask); > -} > - > -void > -ironlake_disable_display_irq(struct drm_i915_private *dev_priv, u32 mask) > -{ > - ilk_update_display_irq(dev_priv, mask, 0); > -} > - > /** > * ilk_update_gt_irq - update GTIMR > * @dev_priv: driver private > @@ -2645,7 +2633,7 @@ static int ironlake_enable_vblank(struct drm_device > *dev, unsigned int pipe) > DE_PIPE_VBLANK(pipe); > > spin_lock_irqsave(&dev_priv->irq_lock, irqflags); > - ironlake_enable_display_irq(dev_priv, bit); > + ilk_enable_display_irq(dev_priv, bit); > spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); > > return 0; > @@ -2700,7 +2688,7 @@ static void ironlake_disable_vblank(struct drm_device > *dev, unsigned int pipe) > DE_PIPE_VBLANK(pipe); > > spin_lock_irqsave(&dev_priv->irq_lock, irqflags); > - ironlake_disable_display_irq(dev_priv, bit); > + ilk_disable_display_irq(dev_priv, bit); > spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); > } > > @@ -3452,7 +3440,7 @@ static int ironlake_irq_postinstall(struct drm_device > *dev) > * setup is guaranteed to run in single-threaded context. But we > * need it to make the assert_spin_locked happy. */ > spin_lock_irq(&dev_priv->irq_lock); > - ironlake_enable_display_irq(dev_priv, DE_PCU_EVENT); > + ilk_enable_display_irq(dev_priv, DE_PCU_EVENT); > spin_unlock_irq(&dev_priv->irq_lock); > } > > diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c > b/drivers/gpu/drm/i915/intel_fifo_underrun.c > index 7ae182d0594b..48bd079bdb06 100644 > --- a/drivers/gpu/drm/i915/intel_fifo_underrun.c > +++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c > @@ -128,9 +128,9 @@ static void ironlake_set_fifo_underrun_reporting(struct > drm_device *dev, > DE_PIPEB_FIFO_UNDERRUN; > > if (enable) > - ironlake_enable_display_irq(dev_priv, bit); > + ilk_enable_display_irq(dev_priv, bit); > else > - ironlake_disable_display_irq(dev_priv, bit); > + ilk_disable_display_irq(dev_priv, bit); > } > > static void ivybridge_check_fifo_underruns(struct intel_crtc *crtc) > @@ -161,9 +161,9 @@ static void ivybridge_set_fifo_underrun_reporting(struct > drm_device *dev, > if (!ivb_can_enable_err_int(dev)) > return; > > - ironlake_enable_display_irq(dev_priv, DE_ERR_INT_IVB); > + ilk_enable_display_irq(dev_priv, DE_ERR_INT_IVB); > } else { > - ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB); > + ilk_disable_display_irq(dev_priv, DE_ERR_INT_IVB); > > if (old && > I915_READ(GEN7_ERR_INT) & ERR_INT_FIFO_UNDERRUN(pipe)) { > -- > 2.4.10 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
