On Wed, Oct 21, 2015 at 06:41:46PM +0300, Mika Kuoppala wrote: > From: Damien Lespiau <[email protected]> > > Create a new debufs file for it, we'll have a few more things to add > there. > > v2: Fix checkpatch warning about static const array > > Signed-off-by: Damien Lespiau <[email protected]> (v1) > Signed-off-by: Mika Kuoppala <[email protected]> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > b/drivers/gpu/drm/i915/i915_debugfs.c > index a3b22bd..ceae425 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2777,6 +2777,27 @@ static int i915_power_domain_info(struct seq_file *m, > void *unused) > return 0; > } > > +static int i915_dmc_info(struct seq_file *m, void *unused) > +{ > + struct drm_info_node *node = m->private; > + struct drm_device *dev = node->minor->dev; > + struct drm_i915_private *dev_priv = dev->dev_private; > + enum csr_state csr_state; > + static const char * const csr_state_str[] = { > + "unknown", "loaded", "error" > + };
I'd use named initializers here. With that Reviewed-by: Ville Syrjälä <[email protected]> > + > + if (!HAS_CSR(dev)) { > + seq_puts(m, "not supported\n"); > + return 0; > + } > + > + csr_state = intel_csr_load_status_get(dev_priv); A side note: intel_csr_load_status_get() seems pretty useless. The lock is protecting a single variable read. > + seq_printf(m, "status: %s\n", csr_state_str[csr_state]); > + > + return 0; > +} > + > static void intel_seq_print_mode(struct seq_file *m, int tabs, > struct drm_display_mode *mode) > { > @@ -5236,6 +5257,7 @@ static const struct drm_info_list i915_debugfs_list[] = > { > {"i915_energy_uJ", i915_energy_uJ, 0}, > {"i915_runtime_pm_status", i915_runtime_pm_status, 0}, > {"i915_power_domain_info", i915_power_domain_info, 0}, > + {"i915_dmc_info", i915_dmc_info, 0}, > {"i915_display_info", i915_display_info, 0}, > {"i915_semaphore_status", i915_semaphore_status, 0}, > {"i915_shared_dplls_info", i915_shared_dplls_info, 0}, > -- > 2.1.4 > > _______________________________________________ > Intel-gfx mailing list > [email protected] > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
