On Fri, Sep 25, 2015 at 02:33:40PM +0100, Arun Siluvery wrote:
> Updated WA with the name.
> 
> Signed-off-by: Arun Siluvery <[email protected]>

Reviewed-by: Ville Syrjälä <[email protected]>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index c73d37d..9151a2b 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -136,13 +136,10 @@ static void bxt_init_clock_gating(struct drm_device 
> *dev)
>                                         
> GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ));
>       }
>  
> -     if (INTEL_REVID(dev) == BXT_REVID_A0) {
> -             /*
> -              * Hardware specification requires this bit to be
> -              * set to 1 for A0
> -              */
> +     /* WaStoreMultiplePTEenable:bxt */
> +     /* This is a requirement according to Hardware specification */
> +     if (INTEL_REVID(dev) == BXT_REVID_A0)
>               I915_WRITE(TILECTL, I915_READ(TILECTL) | TILECTL_TLBPF);
> -     }
>  
>       /* WaSetClckGatingDisableMedia:bxt */
>       if (INTEL_REVID(dev) == BXT_REVID_A0) {
> -- 
> 1.9.1
> 
> _______________________________________________
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> [email protected]
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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