As per spec this is applicable to 3x6 SKUs only, add condition to check the same.
Cc: Nick Hoath <[email protected]> Signed-off-by: Arun Siluvery <[email protected]> --- drivers/gpu/drm/i915/intel_pm.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 0f6588c..bfce904 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -119,12 +119,12 @@ static void bxt_init_clock_gating(struct drm_device *dev) gen9_init_clock_gating(dev); - /* - * FIXME: - * GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ applies on 3x6 GT SKUs only. - */ - I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | - GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ); + /* WaSetHDCunitClckGatingDisable:bxt */ + /* as per spec this is applicable to 3x6 GT SKUs only */ + if (INTEL_INFO(dev)->subslice_total == 3) { + I915_WRITE(GEN8_UCGCTL6, (I915_READ(GEN8_UCGCTL6) | + GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ)); + } if (INTEL_REVID(dev) == BXT_REVID_A0) { /* -- 1.9.1 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
