On Thu, Sep 03, 2015 at 09:50:16PM +0300, [email protected] wrote:
> From: Ville Syrjälä <[email protected]>
> 
> The pfit state is stored as register values, so dump them as hex instead
> of decimal to make some sense of the error messages.
> 
> Signed-off-by: Ville Syrjälä <[email protected]>

Picked just this one because I liked it. No clue about dsi details but the
new state handling for dsi makes me happy \o/

Cheers, Daniel

> ---
>  drivers/gpu/drm/i915/intel_display.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index 2776974..4aab8f4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -12442,16 +12442,16 @@ intel_pipe_config_compare(struct drm_device *dev,
>       PIPE_CONF_CHECK_I(pipe_src_w);
>       PIPE_CONF_CHECK_I(pipe_src_h);
>  
> -     PIPE_CONF_CHECK_I(gmch_pfit.control);
> +     PIPE_CONF_CHECK_X(gmch_pfit.control);
>       /* pfit ratios are autocomputed by the hw on gen4+ */
>       if (INTEL_INFO(dev)->gen < 4)
>               PIPE_CONF_CHECK_I(gmch_pfit.pgm_ratios);
> -     PIPE_CONF_CHECK_I(gmch_pfit.lvds_border_bits);
> +     PIPE_CONF_CHECK_X(gmch_pfit.lvds_border_bits);
>  
>       PIPE_CONF_CHECK_I(pch_pfit.enabled);
>       if (current_config->pch_pfit.enabled) {
> -             PIPE_CONF_CHECK_I(pch_pfit.pos);
> -             PIPE_CONF_CHECK_I(pch_pfit.size);
> +             PIPE_CONF_CHECK_X(pch_pfit.pos);
> +             PIPE_CONF_CHECK_X(pch_pfit.size);
>       }
>  
>       PIPE_CONF_CHECK_I(scaler_state.scaler_id);
> -- 
> 2.4.6
> 
> _______________________________________________
> Intel-gfx mailing list
> [email protected]
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to