The way the test checks for the RC6 enabled mask atm doesn't work: calling igt_success outside of any subtests doesn't have any effect. This means the test will run a 11 second idle loop for each RC6 state regardless if the platform supports these or have them enabled. Fix this by checking explicitly if a given RC6 state is enabled before reading out/checking the corresponding counter.
With this fix we can also get rid of the GEN6/IVB checks, since the RC6 mask check makes them redundant. We still need the VLV/CHV checks, since media RC6 doesn't have a separate bit in the mask. Signed-off-by: Imre Deak <[email protected]> --- tests/pm_rc6_residency.c | 71 +++++++++++++++++++++++++++++++----------------- 1 file changed, 46 insertions(+), 25 deletions(-) diff --git a/tests/pm_rc6_residency.c b/tests/pm_rc6_residency.c index 14573eb..276fd41 100644 --- a/tests/pm_rc6_residency.c +++ b/tests/pm_rc6_residency.c @@ -38,6 +38,10 @@ #define SLEEP_DURATION 3000 // in milliseconds #define CODE_TIME 50 // in microseconfs +#define RC6_ENABLED 1 +#define RC6P_ENABLED 2 +#define RC6PP_ENABLED 4 + struct residencies { int rc6; int media_rc6; @@ -61,29 +65,33 @@ static unsigned int readit(const char *path) return ret; } +static unsigned long get_rc6_enabled_mask(void) +{ + unsigned long rc6_mask; + char *path; + int ret; + + ret = asprintf(&path, "/sys/class/drm/card%d/power/rc6_enable", + drm_get_card()); + igt_assert_neq(ret, -1); + rc6_mask = readit(path); + free(path); + + return rc6_mask; +} + static int read_rc6_residency(const char *name_of_rc6_residency) { unsigned int i; const int device = drm_get_card(); char *path ; int ret; - FILE *file; int value[2]; /* For some reason my ivb isn't idle even after syncing up with the gpu. * Let's add a sleept just to make it happy. */ sleep(5); - ret = asprintf(&path, "/sys/class/drm/card%d/power/rc6_enable", device); - igt_assert_neq(ret, -1); - - file = fopen(path, "r"); - igt_require(file); - - /* claim success if no rc6 enabled. */ - if (readit(path) == 0) - igt_success(); - for(i = 0; i < 2; i++) { sleep(SLEEP_DURATION / 1000); @@ -109,20 +117,26 @@ static void residency_accuracy(unsigned int diff, "Sysfs RC6 residency counter is inaccurate.\n"); } -static void measure_residencies(int devid, struct residencies *res) +static void measure_residencies(int devid, unsigned int rc6_mask, + struct residencies *res) { - res->rc6 = read_rc6_residency("rc6"); - if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) + if (rc6_mask & RC6_ENABLED) + res->rc6 = read_rc6_residency("rc6"); + + if ((rc6_mask & RC6_ENABLED) && + (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid))) res->media_rc6 = read_rc6_residency("media_rc6"); - if (IS_GEN6(devid) || IS_IVYBRIDGE(devid)) { + if (rc6_mask & RC6P_ENABLED) res->rc6p = read_rc6_residency("rc6p"); + + if (rc6_mask & RC6PP_ENABLED) res->rc6pp = read_rc6_residency("rc6pp"); - } } igt_main { + unsigned int rc6_mask; int fd; int devid = 0; struct residencies res; @@ -135,22 +149,29 @@ igt_main devid = intel_get_drm_devid(fd); close(fd); - measure_residencies(devid, &res); + rc6_mask = get_rc6_enabled_mask(); + measure_residencies(devid, rc6_mask, &res); } - igt_subtest("rc6-accuracy") + igt_subtest("rc6-accuracy") { + igt_skip_on(!(rc6_mask & RC6_ENABLED)); + residency_accuracy(res.rc6, "rc6"); - igt_subtest("media-rc6-accuracy") - if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) - residency_accuracy(res.media_rc6, "media_rc6"); + } + igt_subtest("media-rc6-accuracy") { + igt_skip_on(!((rc6_mask & RC6_ENABLED) && + (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)))); + + residency_accuracy(res.media_rc6, "media_rc6"); + } igt_subtest("rc6p-accuracy") { - if (!IS_GEN6(devid) && !IS_IVYBRIDGE(devid)) - igt_skip("This platform doesn't support RC6p\n"); + igt_skip_on(!(rc6_mask & RC6P_ENABLED)); + residency_accuracy(res.rc6p, "rc6p"); } igt_subtest("rc6pp-accuracy") { - if (!IS_GEN6(devid) && !IS_IVYBRIDGE(devid)) - igt_skip("This platform doesn't support RC6pp\n"); + igt_skip_on(!(rc6_mask & RC6PP_ENABLED)); + residency_accuracy(res.rc6pp, "rc6pp"); } } -- 2.1.4 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
