On Fri, Mar 20, 2015 at 10:49:19AM +0000, Chris Wilson wrote:
> On Fri, Mar 20, 2015 at 11:29:25AM +0100, Daniel Vetter wrote:
> > On Thu, Mar 19, 2015 at 04:50:22PM +0000, Chris Wilson wrote:
> > > On Thu, Mar 19, 2015 at 05:35:17PM +0100, Daniel Vetter wrote:
> > > > On Thu, Mar 19, 2015 at 11:29:40AM +0000, Chris Wilson wrote:
> > > > > +     if (obj->map_and_fenceable) {
> > > > > +             /* Install a fence for tiled scan-out. Pre-i965 always 
> > > > > needs a
> > > > > +              * fence, whereas 965+ only requires a fence if using
> > > > > +              * framebuffer compression.  For simplicity, we always, 
> > > > > when
> > > > > +              * possible, install a fence as the cost is not that 
> > > > > onerous.
> 
> > Oh right I've forgotten that fbc hw only works with X tiled and that we
> > use the fence_reg as a proxy. Adding a comment would be useful though.
> 
> * If we fail to fence the tiled scanout, then either the modeset will
> * reject the change (which is highly unlikely as the affected systems,
> * all but one, do not have unmappable space) or we will not be able to
> * enable full powersaving techniques (also likely not to apply due to
> * various limits FBC and the like impose on the size of the buffer,
> * which presumably we violated anyway with this unmappable buffer).
> * Anyway, it is presumably better to stumble onwards with something and
> * try to run the system in a "less than optimal" mode that matches the
> * user configuration.

I actually thought of a comment in the obj->fence_reg check in the fbc
code that we now can have frontbuffers lacking fences. And that the check
isn't just a proxy check for x-tiled anymore.

Just to avoid someone replacing the obj->fence_reg check with a
obj->tiling_mode == X_TILING check somewhen in the future.

Not fencing here is imo clear, since iirc on gen3 fences in the unmappable
part are not allowed.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to