On Tue, Mar 10, 2015 at 01:15:28PM +0200, [email protected] wrote:
> From: Ville Syrjälä <[email protected]>
> 
> Signed-off-by: Ville Syrjälä <[email protected]>

The actual diff here needs to be regenerated since my patch got merged
and changed this area of the code, but your final solution looks right
to me.  The main difference between your patch here and what got merged
yesterday is that your patch starts using state->visible rather than
state->fb, which is the right move to make.

So assuming you rebase your changes onto the latest code,
Reviewed-by: Matt Roper <[email protected]>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 24 +++++++++++++++++-------
>  1 file changed, 17 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index a06a2c7..499e054 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -1955,6 +1955,7 @@ static void ilk_compute_wm_parameters(struct drm_crtc 
> *crtc,
>       struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>       enum pipe pipe = intel_crtc->pipe;
>       struct drm_plane *plane;
> +     const struct intel_plane_state *state;
>  
>       if (!intel_crtc->active)
>               return;
> @@ -1962,13 +1963,22 @@ static void ilk_compute_wm_parameters(struct drm_crtc 
> *crtc,
>       p->active = true;
>       p->pipe_htotal = intel_crtc->config->base.adjusted_mode.crtc_htotal;
>       p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc);
> -     p->pri.bytes_per_pixel = crtc->primary->state->fb->bits_per_pixel / 8;
> -     p->cur.bytes_per_pixel = 4;
> -     p->pri.horiz_pixels = intel_crtc->config->pipe_src_w;
> -     p->cur.horiz_pixels = intel_crtc->base.cursor->state->crtc_w;
> -     /* TODO: for now, assume primary and cursor planes are always enabled. 
> */
> -     p->pri.enabled = true;
> -     p->cur.enabled = true;
> +
> +     state = to_intel_plane_state(crtc->primary->state);
> +     if (state->visible) {
> +             p->pri.enabled = true;
> +             p->pri.bytes_per_pixel =
> +                     drm_format_plane_cpp(state->base.fb->pixel_format, 0);
> +             p->pri.horiz_pixels = drm_rect_width(&state->dst);
> +     }
> +
> +     state = to_intel_plane_state(crtc->cursor->state);
> +     if (state->visible) {
> +             p->cur.enabled = true;
> +             p->cur.bytes_per_pixel =
> +                     drm_format_plane_cpp(state->base.fb->pixel_format, 0);
> +             p->cur.horiz_pixels = state->base.crtc_w;
> +     }
>  
>       drm_for_each_legacy_plane(plane, &dev->mode_config.plane_list) {
>               struct intel_plane *intel_plane = to_intel_plane(plane);
> -- 
> 2.0.5
> 
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-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795
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