On 19/11/14 23:33, Daniel Vetter wrote:
> This is (mostly, some exceptions that need fixing) the hw setup
> function which starts the ring. And not the function which allocates
> all the resources.
> 
> Make this clear by giving it a better name.
> 
> Signed-off-by: Daniel Vetter <[email protected]>

Reviewed-by: Dave Gordon <[email protected]>

> ---
>  drivers/gpu/drm/i915/intel_lrc.c        | 14 +++++++-------
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 12 ++++++------
>  drivers/gpu/drm/i915/intel_ringbuffer.h |  2 +-
>  3 files changed, 14 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c 
> b/drivers/gpu/drm/i915/intel_lrc.c
> index e588376227ea..5e14316c80d0 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1389,8 +1389,8 @@ static int logical_ring_init(struct drm_device *dev, 
> struct intel_engine_cs *rin
>       if (ret)
>               return ret;
>  
> -     if (ring->init) {
> -             ret = ring->init(ring);
> +     if (ring->init_hw) {
> +             ret = ring->init_hw(ring);
>               if (ret)
>                       return ret;
>       }
> @@ -1415,7 +1415,7 @@ static int logical_render_ring_init(struct drm_device 
> *dev)
>       if (HAS_L3_DPF(dev))
>               ring->irq_keep_mask |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
>  
> -     ring->init = gen8_init_render_ring;
> +     ring->init_hw = gen8_init_render_ring;
>       ring->init_context = intel_logical_ring_workarounds_emit;
>       ring->cleanup = intel_fini_pipe_control;
>       ring->get_seqno = gen8_get_seqno;
> @@ -1442,7 +1442,7 @@ static int logical_bsd_ring_init(struct drm_device *dev)
>       ring->irq_keep_mask =
>               GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS1_IRQ_SHIFT;
>  
> -     ring->init = gen8_init_common_ring;
> +     ring->init_hw = gen8_init_common_ring;
>       ring->get_seqno = gen8_get_seqno;
>       ring->set_seqno = gen8_set_seqno;
>       ring->emit_request = gen8_emit_request;
> @@ -1467,7 +1467,7 @@ static int logical_bsd2_ring_init(struct drm_device 
> *dev)
>       ring->irq_keep_mask =
>               GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS2_IRQ_SHIFT;
>  
> -     ring->init = gen8_init_common_ring;
> +     ring->init_hw = gen8_init_common_ring;
>       ring->get_seqno = gen8_get_seqno;
>       ring->set_seqno = gen8_set_seqno;
>       ring->emit_request = gen8_emit_request;
> @@ -1492,7 +1492,7 @@ static int logical_blt_ring_init(struct drm_device *dev)
>       ring->irq_keep_mask =
>               GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT;
>  
> -     ring->init = gen8_init_common_ring;
> +     ring->init_hw = gen8_init_common_ring;
>       ring->get_seqno = gen8_get_seqno;
>       ring->set_seqno = gen8_set_seqno;
>       ring->emit_request = gen8_emit_request;
> @@ -1517,7 +1517,7 @@ static int logical_vebox_ring_init(struct drm_device 
> *dev)
>       ring->irq_keep_mask =
>               GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT;
>  
> -     ring->init = gen8_init_common_ring;
> +     ring->init_hw = gen8_init_common_ring;
>       ring->get_seqno = gen8_get_seqno;
>       ring->set_seqno = gen8_set_seqno;
>       ring->emit_request = gen8_emit_request;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
> b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 1d01b51ff058..367a715a044c 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1842,7 +1842,7 @@ static int intel_init_ring_buffer(struct drm_device 
> *dev,
>       if (ret)
>               goto error;
>  
> -     ret = ring->init(ring);
> +     ret = ring->init_hw(ring);
>       if (ret)
>               goto error;
>  
> @@ -2419,7 +2419,7 @@ int intel_init_render_ring_buffer(struct drm_device 
> *dev)
>               ring->dispatch_execbuffer = i830_dispatch_execbuffer;
>       else
>               ring->dispatch_execbuffer = i915_dispatch_execbuffer;
> -     ring->init = init_render_ring;
> +     ring->init_hw = init_render_ring;
>       ring->cleanup = render_ring_cleanup;
>  
>       /* Workaround batchbuffer to combat CS tlb bug. */
> @@ -2512,7 +2512,7 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
>               }
>               ring->dispatch_execbuffer = i965_dispatch_execbuffer;
>       }
> -     ring->init = init_ring_common;
> +     ring->init_hw = init_ring_common;
>  
>       return intel_init_ring_buffer(dev, ring);
>  }
> @@ -2551,7 +2551,7 @@ int intel_init_bsd2_ring_buffer(struct drm_device *dev)
>               ring->semaphore.signal = gen8_xcs_signal;
>               GEN8_RING_SEMAPHORE_INIT;
>       }
> -     ring->init = init_ring_common;
> +     ring->init_hw = init_ring_common;
>  
>       return intel_init_ring_buffer(dev, ring);
>  }
> @@ -2608,7 +2608,7 @@ int intel_init_blt_ring_buffer(struct drm_device *dev)
>                       ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;
>               }
>       }
> -     ring->init = init_ring_common;
> +     ring->init_hw = init_ring_common;
>  
>       return intel_init_ring_buffer(dev, ring);
>  }
> @@ -2659,7 +2659,7 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev)
>                       ring->semaphore.mbox.signal[VCS2] = GEN6_NOSYNC;
>               }
>       }
> -     ring->init = init_ring_common;
> +     ring->init_hw = init_ring_common;
>  
>       return intel_init_ring_buffer(dev, ring);
>  }
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h 
> b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index fe426cff598b..5033cd0d0580 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -146,7 +146,7 @@ struct  intel_engine_cs {
>       bool __must_check (*irq_get)(struct intel_engine_cs *ring);
>       void            (*irq_put)(struct intel_engine_cs *ring);
>  
> -     int             (*init)(struct intel_engine_cs *ring);
> +     int             (*init_hw)(struct intel_engine_cs *ring);
>  
>       int             (*init_context)(struct intel_engine_cs *ring,
>                                       struct intel_context *ctx);
> 

_______________________________________________
Intel-gfx mailing list
[email protected]
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to