On Mon, Nov 17, 2014 at 04:43:47PM +0200, [email protected] wrote: > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 9c6bc82..5eeb456 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -4745,6 +4745,21 @@ static int valleyview_get_vco(struct drm_i915_private > *dev_priv) > return vco_freq[hpll_freq] * 1000; > } > > +static void intel_update_max_cdclk(struct drm_device *dev) > +{ > + struct drm_i915_private *dev_priv = dev->dev_private; > + > + if (IS_VALLEYVIEW(dev)) { > + dev_priv->max_cdclk_freq = 400000;
I've thought the 400MHz mode is busted? Or is that just Punit bonghits on SDVs and pre-prod boards? -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
