On Wed, 27 May 2026, Dibin Moolakadan Subrahmanian <[email protected]> wrote: > Store DC3CO eligibility in intel_dp->psr during > intel_psr_post_plane_update() so PSR configuration > can take DC3CO into account. > > This will be used to control PSR2 parameters such as idle frames. > > Changes in v2: > - Use intel_display_power_dc3co_allowed(display) instead > of intel_dc3co_allowed(state) > > Changes in v4: > - Update psr.dc3co_eligible before > intel_psr_enable_locked() call (sashiko) > > Signed-off-by: Dibin Moolakadan Subrahmanian > <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_display_types.h | 2 ++ > drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++ > 2 files changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h > b/drivers/gpu/drm/i915/display/intel_display_types.h > index 1cfc585530dc..c21f5d1e2003 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -1770,6 +1770,8 @@ struct intel_psr { > ktime_t last_exit; > bool sink_not_reliable; > bool irq_aux_error; > + /* DC3CO eligibility used to control PSR configuration */ > + bool dc3co_eligible; > u16 su_w_granularity; > u16 su_y_granularity; > bool source_panel_replay_support; > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 730ca7af7873..d4b294beecef 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -2300,6 +2300,7 @@ static void intel_psr_disable_locked(struct intel_dp > *intel_dp) > intel_dp->psr.psr2_sel_fetch_cff_enabled = false; > intel_dp->psr.active_non_psr_pipes = 0; > intel_dp->psr.pkg_c_latency_used = 0; > + intel_dp->psr.dc3co_eligible = false; > } > > /** > @@ -3090,10 +3091,14 @@ void intel_psr_post_plane_update(struct > intel_atomic_state *state, > const struct intel_crtc_state *crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > struct intel_encoder *encoder; > + bool dc3co_eligible; > > if (!crtc_state->has_psr) > return; > > + dc3co_eligible = intel_display_power_dc3co_allowed(display) && > + intel_display_power_dc3co_supported(display);
Maybe just "allowed"? Eligible sounds fancy, and makes you wonder what's the difference with allowed. And allowed() should never return true if !supported(), i.e. allowed() && supported() shouldn't have to be required here. BR, Jani. > + > verify_panel_replay_dsc_state(crtc_state); > > for_each_intel_encoder_mask_with_psr(state->base.dev, encoder, > @@ -3121,6 +3126,8 @@ void intel_psr_post_plane_update(struct > intel_atomic_state *state, > keep_disabled = true; > } > > + intel_dp->psr.dc3co_eligible = dc3co_eligible; > + > if (!psr->enabled && !keep_disabled) > intel_psr_enable_locked(intel_dp, crtc_state); > else if (psr->enabled && !crtc_state->wm_level_disabled) -- Jani Nikula, Intel
