> Subject: [PATCH v2 16/24] drm/i915/lt_phy: Replace crtc compute clock > > The existing DPLL compute clock callback for the XE3PLPD platform > (`xe3plpd_crtc_compute_clock`) was specific to that platform. Replace it with > the more generic Haswell (`hsw_crtc_compute_clock`) implementation so that > the compute clock path does not rely on the XE3PLPD hook. >
Patch looks good mostly but does not belong here. This breaks bisectability reason being dpll_mgr is currently null for LT PHY And it will never do the compute_dpll call without warning. Still going through patches will call out where it can be added. Regards, Suraj Kandpal > Signed-off-by: Mika Kahola <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_dpll.c | 20 +------------------- > 1 file changed, 1 insertion(+), 19 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c > b/drivers/gpu/drm/i915/display/intel_dpll.c > index abc85ee9b832..c7d37e74fbe9 100644 > --- a/drivers/gpu/drm/i915/display/intel_dpll.c > +++ b/drivers/gpu/drm/i915/display/intel_dpll.c > @@ -1212,24 +1212,6 @@ static int dg2_crtc_compute_clock(struct > intel_atomic_state *state, > return 0; > } > > -static int xe3plpd_crtc_compute_clock(struct intel_atomic_state *state, > - struct intel_crtc *crtc) > -{ > - struct intel_crtc_state *crtc_state = > - intel_atomic_get_new_crtc_state(state, crtc); > - struct intel_encoder *encoder = > - intel_get_crtc_new_encoder(state, crtc_state); > - int ret; > - > - ret = intel_lt_phy_pll_calc_state(crtc_state, encoder, &crtc_state- > >dpll_hw_state); > - if (ret) > - return ret; > - > - crtc_state->hw.adjusted_mode.crtc_clock = > intel_crtc_dotclock(crtc_state); > - > - return 0; > -} > - > static int ilk_fb_cb_factor(const struct intel_crtc_state *crtc_state) { > struct intel_display *display = to_intel_display(crtc_state); @@ - > 1690,7 +1672,7 @@ static int i8xx_crtc_compute_clock(struct > intel_atomic_state *state, } > > static const struct intel_dpll_global_funcs xe3plpd_dpll_funcs = { > - .crtc_compute_clock = xe3plpd_crtc_compute_clock, > + .crtc_compute_clock = hsw_crtc_compute_clock, > .crtc_get_dpll = hsw_crtc_get_dpll, > }; > > -- > 2.43.0
